Task #967
Milestone #128: PRUEBAS DE DISEÑO
Test de adquisición para envío de varios IPP's
Start date:
09/21/2017
Due date:
09/26/2017
% Done:
100%
History
#1 Updated by John Rojas over 7 years ago
- Subject changed from Test de adquisición con NTX>1 to Test de adquisición para envío de varios IPP's
- Due date changed from 05/18/2017 to 05/22/2017
#2 Updated by John Rojas over 7 years ago
- Due date changed from 05/22/2017 to 06/08/2017
- Start date changed from 05/16/2017 to 06/06/2017
#3 Updated by John Rojas over 7 years ago
- Start date changed from 06/06/2017 to 06/07/2017
#4 Updated by John Rojas over 7 years ago
- Due date changed from 06/08/2017 to 07/14/2017
- Start date changed from 06/07/2017 to 07/12/2017
#5 Updated by John Rojas over 7 years ago
- Parent task changed from #197 to #128
#6 Updated by John Rojas over 7 years ago
- Due date changed from 07/14/2017 to 09/15/2017
- Start date changed from 07/12/2017 to 09/13/2017
#7 Updated by John Rojas over 7 years ago
- Due date changed from 09/15/2017 to 09/26/2017
- Status changed from New to In progress
- Start date changed from 09/13/2017 to 09/21/2017
- % Done changed from 0 to 90
- 25/09/2017: Se creó el bloque gen_cr_signals.vhd en el FPGA de Control para simulación de señales SYNC y WIN del CR y comportamiento cuando se envían varios IPP's. Conexión con la tarjeta Bus para generación y envío de datos a la tarjeta de Control.
#8 Updated by John Rojas about 7 years ago
- Status changed from In progress to Resolved
- % Done changed from 90 to 100
#9 Updated by John Rojas about 7 years ago
- Status changed from Resolved to Closed