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Task #1628

Milestone #1576: RC 2.1 IMAGING

Implementar un registro de cuenta de pulsos para el clock en el FPGA

Added by Joaquín Verástegui over 5 years ago. Updated 11 months ago.

Status:
Closed
Priority:
Normal
Assignee:
Victor Vásquez
Start date:
02/21/2019
Due date:
04/29/2019
% Done:

0%

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History

#1 Updated by Joaquín Verástegui over 5 years ago

  • Assignee changed from Juan Llanos to Victor Vásquez

#2 Updated by Victor Vásquez over 5 years ago

  • Due date set to 04/29/2019

#3 Updated by Victor Vásquez over 5 years ago

  • Status changed from New to Comments

#4 Updated by John Rojas 11 months ago

  • Status changed from Comments to Closed
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