Task #158
Milestone #124: DESCRIPCION DE HARDWARE
Implementar protocolo entre FPGA's de transferencia y control
Start date:
08/31/2015
Due date:
09/13/2015
% Done:
100%
Estimated time:
32.00 h
History
#1
Updated by John Rojas over 8 years ago
Updated by - Subject changed from Implementar comunicación LVDS entre FPGA's to Implementar protocolo entre FPGA's de transferencia y control
#2
Updated by John Rojas over 8 years ago
- Due date set to 09/13/2015
- Status changed from New to Closed
- Start date changed from 10/28/2015 to 08/31/2015
Se implementó los bloques para la comunicación entre los FPGA´s de transferencia y control.
#3
Updated by Joaquín Verástegui over 8 years ago
Updated by - Target version set to Versión 2.0
#4
Updated by John Rojas over 8 years ago
- Estimated time set to 32.00 h