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Task #152

Milestone #123: ESTUDIOS PREVIOS

Revisar protocolo de comunicación LVDS en FPGA

Added by John Rojas over 8 years ago. Updated over 8 years ago.

Status:
Closed
Priority:
Normal
Assignee:
Target version:
Start date:
08/03/2015
Due date:
08/23/2015
% Done:

100%

History

#1 Updated by John Rojas over 8 years ago

  • Assignee set to John Rojas

#2 Updated by John Rojas over 8 years ago

  • % Done changed from 0 to 80

#3 Updated by Joaquín Verástegui over 8 years ago

  • Target version set to Versión 2.0

#4 Updated by John Rojas over 8 years ago

  • Due date set to 08/23/2015
  • Status changed from New to Resolved
  • Start date changed from 10/28/2015 to 08/03/2015
  • % Done changed from 80 to 100

#5 Updated by John Rojas over 8 years ago

  • Status changed from Resolved to Closed

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