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-- test_comb Template
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LIBRARY ieee;
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USE ieee.std_logic_1164.ALL;
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USE ieee.numeric_std.ALL;
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library IEEE_proposed;
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use IEEE_proposed.fixed_pkg.all;
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use work.cic_utils.all;
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ENTITY test_decim IS
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END test_decim;
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ARCHITECTURE behavior OF test_decim IS
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-- Component Declaration
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COMPONENT decimator
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Port ( clkin : in STD_LOGIC;
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clkout: out STD_LOGIC;
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reset : in std_logic;
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N : in integer range 0 to 19;
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input : in sfixed(NUMBER_BITS-1 downto MANTISSA_BITS);
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output : out sfixed(NUMBER_BITS-1 downto MANTISSA_BITS));
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END COMPONENT;
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--Inputs
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signal clkin : std_logic := '0';
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signal reset : std_logic := '0';
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signal N : integer range 0 to 19:= 11;
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signal input : sfixed(NUMBER_BITS-1 downto MANTISSA_BITS):= (others => '0');
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--Outputs
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signal clkout : std_logic := '0';
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signal output : sfixed(NUMBER_BITS-1 downto MANTISSA_BITS);
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-- Clock period definitions
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constant clk_period : time := 1 ms;
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BEGIN
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-- Instantiate the Unit Under Test (UUT)
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uut: decimator PORT MAP(
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clkin => clkin,
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clkout => clkout,
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reset => reset,
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N => N,
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input => input,
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output => output
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);
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-- Clock process definitions
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clk_process :process
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begin
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clkin <= '1';
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wait for clk_period/2;
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clkin <= '0';
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wait for clk_period/2;
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end process;
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-- Stimulus process
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stim_proc: process
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begin
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-- hold reset state for 1 ms.
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wait for clk_period;
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input <= to_sfixed(1,input);
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wait for clk_period;
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input <= to_sfixed(2,input);
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wait for clk_period;
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input <= to_sfixed(3,input);
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wait for clk_period;
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input <= to_sfixed(4,input);
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wait for clk_period;
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input <= to_sfixed(5,input);
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wait for clk_period;
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input <= to_sfixed(6,input);
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wait for clk_period;
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input <= to_sfixed(7,input);
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wait for clk_period;
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input <= to_sfixed(8,input);
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wait for clk_period;
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input <= to_sfixed(9,input);
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wait for clk_period;
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input <= to_sfixed(10,input);
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wait for clk_period;
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input <= to_sfixed(11,input);
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wait for clk_period;
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input <= to_sfixed(12,input);
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wait for clk_period;
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input <= to_sfixed(13,input);
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wait for clk_period;
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input <= to_sfixed(14,input);
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wait for clk_period;
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input <= to_sfixed(15,input);
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wait for clk_period;
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input <= to_sfixed(16,input);
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wait for clk_period;
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input <= to_sfixed(17,input);
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wait for clk_period;
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input <= to_sfixed(18,input);
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wait for clk_period;
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input <= to_sfixed(19,input);
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wait for clk_period;
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input <= to_sfixed(20,input);
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end process;
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END;
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