jro_hard/gen_acq Files · trunk/firmware/sources/processingEngine/main.vhd

Se siguieron las recomendaciones del Ing. Miguel Urco. Se ruteó de nuevo la parte analógica del circuito de adquicision

aaguilar - - Load All Authors

File last commit:

r149:150


                r167:168

Download file

             main.vhd
        
                    15 lines
            
             | 191 B
            
                | text/x-vhdl
            
             |
                VhdlLexer
            
             / trunk / firmware / sources / processingEngine / main.vhd
          
                    History
                
                 |
                  Annotation
                 | Raw
                 |Copy content
                 |Copy permalink

      library ieee;

      use ieee.std_logic_1164.all;

      entity main is

      	port (

      		clk : in std_logic;

      		rst : in std_logic

      	);

      end entity main;

      architecture RTL of main is

      begin

      end architecture RTL;

	Site-wide shortcuts
/	Use quick search box
g h	Goto home page
g g	Goto my private gists page
g G	Goto my public gists page
g 0-9	Goto bookmarked items from 0-9
n r	New repository page
n g	New gist page

	Repositories
g s	Goto summary page
g c	Goto changelog page
g f	Goto files page
g F	Goto files page with file search activated
g p	Goto pull requests page
g o	Goto repository settings
g O	Goto repository access permissions settings
t s	Toggle sidebar on some pages

				library ieee;
				use ieee.std_logic_1164.all;

				entity main is
				port (
				clk : in std_logic;
				rst : in std_logic
				);
				end entity main;

				architecture RTL of main is

				begin

				end architecture RTL;