# SVN changeset patch
# User aaguilar
# Date 2014-08-04 18:47:31.095080
# Revision 72
Index: trunk/eagle/PowerEngine/DRILEGEND.CFG
===================================================================
diff --git a/trunk/eagle/PowerEngine/DRILEGEND.CFG b/trunk/eagle/PowerEngine/DRILEGEND.CFG
deleted file mode 10644
--- a/trunk/eagle/PowerEngine/DRILEGEND.CFG (revision 71)
+++ /dev/null (revision 72)
@@ -1,42 +0,0 @@
-InputUserCfg = 1
-SymbolLayer = 144
-SymbolSize = 40
-SymbolWidth = 4
-TextSize = 70.0000
-TextRatio = 5
-IdxFnt = 0
-decMM = 2
-decMIL = 0
-SortHoles = 1
-TolPlated = 0.02
-TolNonPlated = 0.03
-PlatedStatusNot = NOT
-PlatedStatusBoth = BOTH
-PlatedStatusYes = YES
-VerticalChart = 1
-HighCellFactor = 1.10
-WideCellFactor = 1.10
-CellOutline = 4
-TitleOutline = 4
-TableOutline = 8
-SymbTitle = Sym
-ToolTitle = N°
-MMTitle = MM
-MilTitle = Mils
-MicTitle = Mic
-QtyTitle = Qty
-TypeTitle = Plated
-ToleTitle = Tol
-SymbRank = 1
-ToolRank = 2
-MMRank = 4
-MilRank = 3
-MicRank = 0
-QtyRank = 5
-TypeRank = 6
-ToleRank = 0
-OutputDrillRack = 0
-DrillRackFile = DRILLRACK.DRL
-Unit = 0
-OutputUserCfg = 1
-UserCfgFile = DRILEGEND.CFG
Index: trunk/eagle/PowerEngine/PowerEngine.brd
===================================================================
diff --git a/trunk/eagle/PowerEngine/PowerEngine.brd b/trunk/eagle/PowerEngine/PowerEngine.brd
deleted file mode 10644
--- a/trunk/eagle/PowerEngine/PowerEngine.brd (revision 71)
+++ /dev/null (revision 72)
@@ -1,2073 +0,0 @@
-
-
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-
-<b>Linear Technology Devices</b><p>
-http://www.linear.com<p>
-<author>Created by librarian@cadsoft.de</author><br>
-<author>Modified by szczepan@stud.fh-hannover.de</author>
-
-
->NAME
->VALUE
-
-
->Name
->Value
-
-
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-
-<h1>Jicamarca Library</h1>
-<p>
-<i>Creado por Jorge Ortiz, 2013.09.13</i>
-<h2>Descripción</h2>
-<p> Esta librería de Eagle 5.9 incluye los diferentes dispositivos que se usan en todos los proyectos en Jicamarca, a excepción de los que estan incluídos por defecto en las librerias de instalación de Eagle.
-<p> Uso: </p>
-<p>Para añadir nuevos dispositivos, se puede abrir la librería en eagle y añadir los dispositivos, símbolo y/o paquetes correspondiente manualmente</p>
-<p>Para añadir nuevos dispositivos desde otras librerías</p>
-<ol>
-<li>Bajarse la libraría correspondiente de Internet y abrirla en Eagle Control Panel</li>
-<li>File > Export > Script (Creará un script con todas las partes de la librería)</li>
-<li>Script > lbrdump.ulp > [Script Exportado en paso anterior] (Creará un script por cada parte)</li>
-<li>Añadir la librería, el export, y las partes a SVN</li>
-<li>Copiar solo las partes necesarias al directorio jocamarca_library/all_parts</li>
-<li>Nota que algunos devices incluyen sus propios símbolos y multiples paquetes, añadir esos también aun si no se usan.</li>
-<li>Desde Eagle Control Panal, abror la librería jicamarca.lbr</li>
-<li>Hacer Run > Script > [Paquetes por importar]</li>
-<li>Hacer Run > Script > [Símbolos por importar]</li>
-<li>Hacer Run > Script > [Devices por importar]</li>
-<li>Comprobar que los nuevos dispositivos estan en la librería</li>
-<li>Hacer Rename al device para ponerle un prefix adecuado (IC_, CONN_, RES_, etc..) y guardar los cambios</li>
-<li>Hacer un commit en SVN a la nueva versión actualizada de la librería</li>
-</ol>
-<p>
-Scripts originales e instrucciones bajados de <a href="http://dangerousprototypes.com/docs/Dangerous_Prototypes_Cadsoft_Eagle_parts_library#Library_helper_scripts">Dangerous Prototypes</a>.
-
-
-<b>RESISTOR</b>
->NAME
->VALUE
-
-
-<b>RESISTOR</b><p>
->NAME
->VALUE
-
-
-<b>RESISTOR</b>
->NAME
->VALUE
-
-
-<b>CAPACITOR</b>
->NAME
->VALUE
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->NAME
->VALUE
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-<b>CAPACITOR</b><p>
->NAME
->VALUE
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->VALUE
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->VALUE
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->VALUE
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->VALUE
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->VALUE
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->VALUE
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->VALUE
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->VALUE
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->NAME
->VALUE
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-
-<b>Zetex Power MOS FETs, Bridges, Diodes</b><p>
-http://www.zetex.com<p>
-<author>Created by librarian@cadsoft.de</author>
-
-
-<b>Small Outline Transistor</b>
->VALUE
->NAME
-
-
-
-
-<b>ON Semiconductor</b><p>
-<a href="http://onsemi.com"> Home page </a><p>
-<author>Created by librarian@cadsoft.de</author>
-
-
->NAME
->VALUE
-
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-
-<b>EAGLE Design Rules</b>
-<p>
-Die Standard-Design-Rules sind so gewählt, dass sie für
-die meisten Anwendungen passen. Sollte ihre Platine
-besondere Anforderungen haben, treffen Sie die erforderlichen
-Einstellungen hier und speichern die Design Rules unter
-einem neuen Namen ab.
-<b>EAGLE Design Rules</b>
-<p>
-The default Design Rules have been set to cover
-a wide range of applications. Your particular design
-may have different requirements, so please make the
-necessary adjustments and save your customized
-design rules under a new name.
-
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Index: trunk/eagle/PowerEngine/PowerEngine.dru
===================================================================
diff --git a/trunk/eagle/PowerEngine/PowerEngine.dru b/trunk/eagle/PowerEngine/PowerEngine.dru
deleted file mode 10644
--- a/trunk/eagle/PowerEngine/PowerEngine.dru (revision 71)
+++ /dev/null (revision 72)
@@ -1,69 +0,0 @@
-description[de] = EAGLE Design Rules \n\nDie Standard-Design-Rules sind so gewählt, dass sie für \ndie meisten Anwendungen passen. Sollte ihre Platine \nbesondere Anforderungen haben, treffen Sie die erforderlichen\nEinstellungen hier und speichern die Design Rules unter \neinem neuen Namen ab.
-description[en] = EAGLE Design Rules \n
\nThe default Design Rules have been set to cover\na wide range of applications. Your particular design\nmay have different requirements, so please make the\nnecessary adjustments and save your customized\ndesign rules under a new name.
-layerSetup = (1*16)
-mtCopper = 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm
-mtIsolate = 1.5mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm
-mdWireWire = 8mil
-mdWirePad = 8mil
-mdWireVia = 8mil
-mdPadPad = 8mil
-mdPadVia = 8mil
-mdViaVia = 8mil
-mdSmdPad = 8mil
-mdSmdVia = 8mil
-mdSmdSmd = 8mil
-mdViaViaSameLayer = 8mil
-mnLayersViaInSmd = 2
-mdCopperDimension = 40mil
-mdDrill = 8mil
-mdSmdStop = 0mil
-msWidth = 10mil
-msDrill = 24mil
-msMicroVia = 9.99mm
-msBlindViaRatio = 0.500000
-rvPadTop = 0.250000
-rvPadInner = 0.250000
-rvPadBottom = 0.250000
-rvViaOuter = 0.250000
-rvViaInner = 0.250000
-rvMicroViaOuter = 0.250000
-rvMicroViaInner = 0.250000
-rlMinPadTop = 10mil
-rlMaxPadTop = 20mil
-rlMinPadInner = 10mil
-rlMaxPadInner = 20mil
-rlMinPadBottom = 10mil
-rlMaxPadBottom = 20mil
-rlMinViaOuter = 8mil
-rlMaxViaOuter = 20mil
-rlMinViaInner = 8mil
-rlMaxViaInner = 20mil
-rlMinMicroViaOuter = 4mil
-rlMaxMicroViaOuter = 20mil
-rlMinMicroViaInner = 4mil
-rlMaxMicroViaInner = 20mil
-psTop = -1
-psBottom = -1
-psFirst = -1
-psElongationLong = 100
-psElongationOffset = 100
-mvStopFrame = 1.000000
-mvCreamFrame = 0.000000
-mlMinStopFrame = 4mil
-mlMaxStopFrame = 4mil
-mlMinCreamFrame = 0mil
-mlMaxCreamFrame = 0mil
-mlViaStopLimit = 0mil
-srRoundness = 0.000000
-srMinRoundness = 0mil
-srMaxRoundness = 0mil
-slThermalIsolate = 10mil
-slThermalsForVias = 0
-dpMaxLengthDifference = 10mm
-dpGapFactor = 2.500000
-checkGrid = 0
-checkAngle = 0
-checkFont = 1
-checkRestrict = 1
-useDiameter = 13
-maxErrors = 50
Index: trunk/eagle/PowerEngine/PowerEngine.sch
===================================================================
diff --git a/trunk/eagle/PowerEngine/PowerEngine.sch b/trunk/eagle/PowerEngine/PowerEngine.sch
--- a/trunk/eagle/PowerEngine/PowerEngine.sch (revision 71)
+++ b/trunk/eagle/PowerEngine/PowerEngine.sch (revision 72)
@@ -2642,7 +2642,6 @@
@@ -2731,7 +2731,7 @@
@@ -2759,7 +2759,6 @@
@@ -2898,16 +2898,11 @@
-
-
-
-
-
-
-
+
+
+
@@ -2993,6 +2987,8 @@
@@ -3289,6 +3285,7 @@
@@ -3319,6 +3316,7 @@
@@ -3616,7 +3614,7 @@
+
+
+
Index: trunk/eagle/PowerEngine/PowerEngine_DL.scr
===================================================================
diff --git a/trunk/eagle/PowerEngine/PowerEngine_DL.scr b/trunk/eagle/PowerEngine/PowerEngine_DL.scr
deleted file mode 10644
--- a/trunk/eagle/PowerEngine/PowerEngine_DL.scr (revision 71)
+++ /dev/null (revision 72)
@@ -1,131 +0,0 @@
-OPEN '/home/aras/proyectos/gen_acq/gen_acq/trunk/eagle/PowerEngine/drilegend.lbr';
-Edit drilegend.pac
-LAYER 144 DrillLegend;
-Display none;
-Display 144;
-Set Wire_Bend 2;
-Grid mil 25 1 mil;
-Layer 1 Top;
-Layer 16 Bottom;
-Layer 18 Vias;
-Layer 19 Unrouted;
-Layer 20 Dimension;
-Layer 21 tPlace;
-Layer 22 bPlace;
-Layer 23 tOrigins;
-Layer 24 bOrigins;
-Layer 25 tNames;
-Layer 26 bNames;
-Layer 27 tValues;
-Layer 28 bValues;
-Layer 29 tStop;
-Layer 30 bStop;
-Layer 31 tCream;
-Layer 32 bCream;
-Layer 35 tGlue;
-Layer 39 tKeepout;
-Layer 44 Drills;
-Layer 51 tDocu;
-Layer 144 DrillLegend;
-Change layer 144;
-Change Size 70.0000;
-Change Ratio 5;
-Change Font Vector;
-MARK;
-Text 'Sym' R0 (26 22);
-Wire 4 (0 0) (230 0) (230 115);
-Text 'N°' R0 (246 22);
-Wire 4 (230 0) (380 0) (380 115);
-Text 'MM' R0 (786 22);
-Wire 4 (690 0) (1000 0) (1000 115);
-Text 'Mils' R0 (416 22);
-Wire 4 (380 0) (690 0) (690 115);
-Text 'Qty' R0 (1026 22);
-Wire 4 (1000 0) (1230 0) (1230 115);
-Text 'Plated' R0 (1282 22);
-Wire 4 (1230 0) (1690 0) (1690 115);
-Wire 4 (R115 -38) (R115 -78);
-Wire 4 (R95 -58) (R135 -58);
-Wire 4 (0 -115) (230 -115) (230 115);
-Text '1' R0 (275 -93);
-Wire 4 (230 -115) (380 -115) (380 115);
-Text '0.13' R0 (726 -93);
-Wire 4 (690 -115) (1000 -115) (1000 115);
-Text '5' R0 (505 -93);
-Wire 4 (380 -115) (690 -115) (690 115);
-Text '5' R0 (1085 -93);
-Wire 4 (1000 -115) (1230 -115) (1230 115);
-Text 'YES' R0 (1371 -93);
-Wire 4 (1230 -115) (1690 -115) (1690 115);
-Wire 4 (R95 -153) (R135 -193);
-Wire 4 (R135 -153) (R95 -193);
-Wire 4 (0 -230) (230 -230) (230 115);
-Text '2' R0 (275 -208);
-Wire 4 (230 -230) (380 -230) (380 115);
-Text '0.41' R0 (726 -208);
-Wire 4 (690 -230) (1000 -230) (1000 115);
-Text '16' R0 (476 -208);
-Wire 4 (380 -230) (690 -230) (690 115);
-Text '7' R0 (1085 -208);
-Wire 4 (1000 -230) (1230 -230) (1230 115);
-Text 'YES' R0 (1371 -208);
-Wire 4 (1230 -230) (1690 -230) (1690 115);
-Wire 4 (0 0) (1690 0) (1690 115);
-Wire 4 (1690 115) (0 115) (0 0);
-Wire 8 (0 -230) (1690 -230) (1690 115);
-Wire 8 (1690 115) (0 115) (0 -230);
-WRITE '/home/aras/proyectos/gen_acq/gen_acq/trunk/eagle/PowerEngine/drilegend.lbr';
-CLOSE;
-EDIT .brd;
-LAYER 144 DrillLegend;
-DISPLAY 23 44 45 144;
-GRID MIL 25 1 ;
-SET WIRE_BEND 2;
-USE '/home/aras/proyectos/gen_acq/gen_acq/trunk/eagle/PowerEngine/drilegend.lbr'
-ADD 'DRILEGEND' DRILEGEND R0 (-60.672 -150.000);
-LAYER 144 DrillLegend;
-TEXT 'LAYER-STACK' (-795.6722 -150.0000);
-LAYER 145 DrillLegend_01-16;
-SET FILL_LAYER 145 9;
-SET COLOR_LAYER 145 2;
-CHANGE SIZE 70.0000;
-TEXT '01-16' (-410.6722 -265.5000);
-MARK (1180.3150 519.6850);
-Wire 4 (R0 20) (R0 -20);
-Wire 4 (R-20 0) (R20 0);
-MARK (1219.6850 519.6850);
-Wire 4 (R0 20) (R0 -20);
-Wire 4 (R-20 0) (R20 0);
-MARK (1200.0000 500.0000);
-Wire 4 (R0 20) (R0 -20);
-Wire 4 (R-20 0) (R20 0);
-MARK (1180.3150 480.3150);
-Wire 4 (R0 20) (R0 -20);
-Wire 4 (R-20 0) (R20 0);
-MARK (1219.6850 480.3150);
-Wire 4 (R0 20) (R0 -20);
-Wire 4 (R-20 0) (R20 0);
-MARK (1096.9651 377.5821);
-Wire 4 (R-20 20) (R20 -20);
-Wire 4 (R20 20) (R-20 -20);
-MARK (1199.8509 376.1326);
-Wire 4 (R-20 20) (R20 -20);
-Wire 4 (R20 20) (R-20 -20);
-MARK (1292.5929 375.4078);
-Wire 4 (R-20 20) (R20 -20);
-Wire 4 (R20 20) (R-20 -20);
-MARK (1013.1407 751.0631);
-Wire 4 (R-20 20) (R20 -20);
-Wire 4 (R20 20) (R-20 -20);
-MARK (924.5228 405.1216);
-Wire 4 (R-20 20) (R20 -20);
-Wire 4 (R20 20) (R-20 -20);
-MARK (1405.8153 662.6463);
-Wire 4 (R-20 20) (R20 -20);
-Wire 4 (R20 20) (R-20 -20);
-MARK (1587.6929 646.5915);
-Wire 4 (R-20 20) (R20 -20);
-Wire 4 (R20 20) (R-20 -20);
-DISPLAY -23 -44 -45;
-WIN FIT;
-GRID LAST;
Index: trunk/eagle/PowerEngine/drilegend.lbr
===================================================================
diff --git a/trunk/eagle/PowerEngine/drilegend.lbr b/trunk/eagle/PowerEngine/drilegend.lbr
deleted file mode 10644
--- a/trunk/eagle/PowerEngine/drilegend.lbr (revision 71)
+++ /dev/null (revision 72)
@@ -1,130 +0,0 @@
-
-
-
-
-
-
-
-
-
-
-
-Sym
-N°
-MM
-Mils
-Qty
-Plated
-1
-0.13
-5
-5
-YES
-2
-0.41
-16
-7
-YES
-
-
-
-
-
-
-
-
-
Index: trunk/eagle/PowerEngine/eagle.epf
===================================================================
diff --git a/trunk/eagle/PowerEngine/eagle.epf b/trunk/eagle/PowerEngine/eagle.epf
--- a/trunk/eagle/PowerEngine/eagle.epf (revision 71)
+++ b/trunk/eagle/PowerEngine/eagle.epf (revision 72)
@@ -364,14 +364,61 @@
UsedLibrary="/home/aras/.eagle/lbr/xilinx_devices_V6.lbr"
UsedLibrary="/home/aras/.eagle/lbr/zetex.lbr"
UsedLibrary="/home/aras/.eagle/lbr/zilog.lbr"
-UsedLibrary="drilegend.lbr"
[Win_1]
+Type="Schematic Editor"
+Loc="0 0 599 399"
+State=0
+Number=2
+File="PowerEngine.sch"
+View="-613.424 133.023 -16.154 585.881"
+WireWidths=" 0 0.3048 0.6096 0.8128 1.016 1.27 1.4224 1.6764 1.778 1.9304 2.1844 2.54 3.81 6.4516 0.4064 0.1524"
+PadDiameters=" 0.254 0.3048 0.4064 0.6096 0.8128 1.016 1.27 1.4224 1.6764 1.778 1.9304 2.1844 2.54 3.81 6.4516 0"
+PadDrills=" 0.5 0.6 0.7 0.9 1 1.1 1.2 1.3 1.4 1.5 1.6 2 2.2 2.8 3.2 0.8"
+ViaDiameters=" 0.254 0.3048 0.4064 0.6096 0.8128 1.016 1.27 1.4224 1.6764 1.778 1.9304 2.1844 2.54 3.81 6.4516 0"
+ViaDrills=" 0.5 0.7 0.8 0.9 1 1.1 1.2 1.3 1.4 1.5 1.6 2 2.2 2.8 3.2 0.6"
+HoleDrills=" 0.5 0.7 0.8 0.9 1 1.1 1.2 1.3 1.4 1.5 1.6 2 2.2 2.8 3.2 0.6"
+TextSizes=" 0.254 0.3048 0.4064 0.6096 0.8128 1.016 1.27 1.4224 1.6764 1.9304 2.1844 2.54 3.81 5.08 6.4516 1.778"
+PolygonSpacings=" 0.254 0.3048 0.4064 0.6096 0.8128 1.016 1.4224 1.6764 1.778 1.9304 2.1844 2.54 3.81 5.08 6.4516 1.27"
+PolygonIsolates=" 0.254 0.3048 0.4064 0.6096 0.8128 1.016 1.27 1.4224 1.6764 1.778 1.9304 2.1844 2.54 3.81 6.4516 0"
+MiterRadiuss=" 0.254 0.3175 0.635 1.27 2.54 1 2 2.5 5 7.5 10 0"
+DimensionWidths=" 0 0.127 0.254 0.1 0.26 0.13"
+DimensionExtWidths=" 0.127 0.254 0.1 0.13 0.26 0"
+DimensionExtLengths=" 1.27 2.54 1 2 3 0"
+DimensionExtOffsets=" 1.27 2.54 1 2 3 0"
+SmdSizes=" 0.3048 0.1524 0.4064 0.2032 0.6096 0.3048 0.8128 0.4064 1.016 0.508 1.27 0.6604 1.4224 0.7112 1.6764 0.8128 1.778 0.9144 1.9304 0.9652 2.1844 1.0668 2.54 1.27 3.81 1.9304 5.08 2.54 6.4516 3.2512 1.27 0.635"
+WireBend=0
+WireBendSet=31
+WireCap=1
+MiterStyle=0
+PadShape=0
+ViaShape=0
+PolygonPour=0
+PolygonRank=0
+PolygonThermals=1
+PolygonOrphans=0
+TextRatio=8
+DimensionUnit=1
+DimensionPrecision=2
+DimensionShowUnit=0
+PinDirection=3
+PinFunction=0
+PinLength=2
+PinVisible=3
+SwapLevel=0
+ArcDirection=0
+AddLevel=2
+PadsSameType=0
+Layer=91
+Sheet=1
+
+[Win_2]
Type="Control Panel"
Loc="465 195 1064 594"
-State=2
+State=1
Number=0
[Desktop]
Screen="1280 1024"
Window="Win_1"
+Window="Win_2"