jro_hard/gen_acq Files · trunk/firmware/sources/processingEngine/main.vhd

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actualizacion epdf de esquematicos y PCBs del circuito de adquicision y pre-procesamiento

aaguilar - - Load All Authors

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             main.vhd
        
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                | text/x-vhdl
            
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                VhdlLexer
            
             / trunk / firmware / sources / processingEngine / main.vhd
          
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        aaguilar
    
              r149
            
      library ieee;

      use ieee.std_logic_1164.all;

      entity main is

      	port (

      		clk : in std_logic;

      		rst : in std_logic

      	);

      end entity main;

      architecture RTL of main is

      begin

      end architecture RTL;

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aaguilar	r149	library ieee;
		use ieee.std_logic_1164.all;

		entity main is
		port (
		clk : in std_logic;
		rst : in std_logic
		);
		end entity main;

		architecture RTL of main is

		begin

		end architecture RTL;