jro_hard/gen_acq Files · trunk/firmware/referencias/DMA-API.txt

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Dynamic DMA mapping using the generic device

============================================

James E.J. Bottomley <James.Bottomley@HansenPartnership.com>

This document describes the DMA API. For a more gentle introduction

of the API (and actual examples), see Documentation/DMA-API-HOWTO.txt.

This API is split into two pieces. Part I describes the basic API.

Part II describes extensions for supporting non-consistent memory

machines. Unless you know that your driver absolutely has to support

non-consistent platforms (this is usually only legacy platforms) you

should only use the API described in part I.

Part I - dma_ API

-------------------------------------

To get the dma_ API, you must #include <linux/dma-mapping.h>. This

provides dma_addr_t and the interfaces described below.

A dma_addr_t can hold any valid DMA or bus address for the platform. It

can be given to a device to use as a DMA source or target. A CPU cannot

reference a dma_addr_t directly because there may be translation between

its physical address space and the bus address space.

Part Ia - Using large DMA-coherent buffers

------------------------------------------

void *

dma_alloc_coherent(struct device *dev, size_t size,

dma_addr_t *dma_handle, gfp_t flag)

Consistent memory is memory for which a write by either the device or

the processor can immediately be read by the processor or device

without having to worry about caching effects. (You may however need

to make sure to flush the processor's write buffers before telling

devices to read that memory.)

This routine allocates a region of <size> bytes of consistent memory.

It returns a pointer to the allocated region (in the processor's virtual

address space) or NULL if the allocation failed.

It also returns a <dma_handle> which may be cast to an unsigned integer the

same width as the bus and given to the device as the bus address base of

the region.

Note: consistent memory can be expensive on some platforms, and the

minimum allocation length may be as big as a page, so you should

consolidate your requests for consistent memory as much as possible.

The simplest way to do that is to use the dma_pool calls (see below).

The flag parameter (dma_alloc_coherent() only) allows the caller to

specify the GFP_ flags (see kmalloc()) for the allocation (the

implementation may choose to ignore flags that affect the location of

the returned memory, like GFP_DMA).

void *

dma_zalloc_coherent(struct device *dev, size_t size,

dma_addr_t *dma_handle, gfp_t flag)

Wraps dma_alloc_coherent() and also zeroes the returned memory if the

allocation attempt succeeded.

void

dma_free_coherent(struct device *dev, size_t size, void *cpu_addr,

dma_addr_t dma_handle)

Free a region of consistent memory you previously allocated. dev,

size and dma_handle must all be the same as those passed into

dma_alloc_coherent(). cpu_addr must be the virtual address returned by

the dma_alloc_coherent().

Note that unlike their sibling allocation calls, these routines

may only be called with IRQs enabled.

Part Ib - Using small DMA-coherent buffers

------------------------------------------

To get this part of the dma_ API, you must #include <linux/dmapool.h>

Many drivers need lots of small DMA-coherent memory regions for DMA

descriptors or I/O buffers. Rather than allocating in units of a page

or more using dma_alloc_coherent(), you can use DMA pools. These work

much like a struct kmem_cache, except that they use the DMA-coherent allocator,

not __get_free_pages(). Also, they understand common hardware constraints

for alignment, like queue heads needing to be aligned on N-byte boundaries.

struct dma_pool *

dma_pool_create(const char *name, struct device *dev,

size_t size, size_t align, size_t alloc);

dma_pool_create() initializes a pool of DMA-coherent buffers

for use with a given device. It must be called in a context which

can sleep.

The "name" is for diagnostics (like a struct kmem_cache name); dev and size

are like what you'd pass to dma_alloc_coherent(). The device's hardware

alignment requirement for this type of data is "align" (which is expressed

in bytes, and must be a power of two). If your device has no boundary

crossing restrictions, pass 0 for alloc; passing 4096 says memory allocated

from this pool must not cross 4KByte boundaries.

void *dma_pool_alloc(struct dma_pool *pool, gfp_t gfp_flags,

dma_addr_t *dma_handle);

This allocates memory from the pool; the returned memory will meet the

size and alignment requirements specified at creation time. Pass

GFP_ATOMIC to prevent blocking, or if it's permitted (not

in_interrupt, not holding SMP locks), pass GFP_KERNEL to allow

blocking. Like dma_alloc_coherent(), this returns two values: an

address usable by the CPU, and the DMA address usable by the pool's

device.

void dma_pool_free(struct dma_pool *pool, void *vaddr,

dma_addr_t addr);

This puts memory back into the pool. The pool is what was passed to

dma_pool_alloc(); the CPU (vaddr) and DMA addresses are what

were returned when that routine allocated the memory being freed.

void dma_pool_destroy(struct dma_pool *pool);

dma_pool_destroy() frees the resources of the pool. It must be

called in a context which can sleep. Make sure you've freed all allocated

memory back to the pool before you destroy it.

Part Ic - DMA addressing limitations

------------------------------------

int

dma_supported(struct device *dev, u64 mask)

Checks to see if the device can support DMA to the memory described by

mask.

Returns: 1 if it can and 0 if it can't.

Notes: This routine merely tests to see if the mask is possible. It

won't change the current mask settings. It is more intended as an

internal API for use by the platform than an external API for use by

driver writers.

int

dma_set_mask_and_coherent(struct device *dev, u64 mask)

Checks to see if the mask is possible and updates the device

streaming and coherent DMA mask parameters if it is.

Returns: 0 if successful and a negative error if not.

int

dma_set_mask(struct device *dev, u64 mask)

Checks to see if the mask is possible and updates the device

parameters if it is.

Returns: 0 if successful and a negative error if not.

int

dma_set_coherent_mask(struct device *dev, u64 mask)

Checks to see if the mask is possible and updates the device

parameters if it is.

Returns: 0 if successful and a negative error if not.

u64

dma_get_required_mask(struct device *dev)

This API returns the mask that the platform requires to

operate efficiently. Usually this means the returned mask

is the minimum required to cover all of memory. Examining the

required mask gives drivers with variable descriptor sizes the

opportunity to use smaller descriptors as necessary.

Requesting the required mask does not alter the current mask. If you

wish to take advantage of it, you should issue a dma_set_mask()

call to set the mask to the value returned.

Part Id - Streaming DMA mappings

--------------------------------

dma_addr_t

dma_map_single(struct device *dev, void *cpu_addr, size_t size,

enum dma_data_direction direction)

Maps a piece of processor virtual memory so it can be accessed by the

device and returns the bus address of the memory.

The direction for both APIs may be converted freely by casting.

However the dma_ API uses a strongly typed enumerator for its

direction:

DMA_NONE no direction (used for debugging)

DMA_TO_DEVICE data is going from the memory to the device

DMA_FROM_DEVICE data is coming from the device to the memory

DMA_BIDIRECTIONAL direction isn't known

Notes: Not all memory regions in a machine can be mapped by this API.

Further, contiguous kernel virtual space may not be contiguous as

physical memory. Since this API does not provide any scatter/gather

capability, it will fail if the user tries to map a non-physically

contiguous piece of memory. For this reason, memory to be mapped by

this API should be obtained from sources which guarantee it to be

physically contiguous (like kmalloc).

Further, the bus address of the memory must be within the

dma_mask of the device (the dma_mask is a bit mask of the

addressable region for the device, i.e., if the bus address of

the memory ANDed with the dma_mask is still equal to the bus

address, then the device can perform DMA to the memory). To

ensure that the memory allocated by kmalloc is within the dma_mask,

the driver may specify various platform-dependent flags to restrict

the bus address range of the allocation (e.g., on x86, GFP_DMA

guarantees to be within the first 16MB of available bus addresses,

as required by ISA devices).

Note also that the above constraints on physical contiguity and

dma_mask may not apply if the platform has an IOMMU (a device which

maps an I/O bus address to a physical memory address). However, to be

portable, device driver writers may *not* assume that such an IOMMU

exists.

Warnings: Memory coherency operates at a granularity called the cache

line width. In order for memory mapped by this API to operate

correctly, the mapped region must begin exactly on a cache line

boundary and end exactly on one (to prevent two separately mapped

regions from sharing a single cache line). Since the cache line size

may not be known at compile time, the API will not enforce this

requirement. Therefore, it is recommended that driver writers who

don't take special care to determine the cache line size at run time

only map virtual regions that begin and end on page boundaries (which

are guaranteed also to be cache line boundaries).

DMA_TO_DEVICE synchronisation must be done after the last modification

of the memory region by the software and before it is handed off to

the driver. Once this primitive is used, memory covered by this

primitive should be treated as read-only by the device. If the device

may write to it at any point, it should be DMA_BIDIRECTIONAL (see

below).

DMA_FROM_DEVICE synchronisation must be done before the driver

accesses data that may be changed by the device. This memory should

be treated as read-only by the driver. If the driver needs to write

to it at any point, it should be DMA_BIDIRECTIONAL (see below).

DMA_BIDIRECTIONAL requires special handling: it means that the driver

isn't sure if the memory was modified before being handed off to the

device and also isn't sure if the device will also modify it. Thus,

you must always sync bidirectional memory twice: once before the

memory is handed off to the device (to make sure all memory changes

are flushed from the processor) and once before the data may be

accessed after being used by the device (to make sure any processor

cache lines are updated with data that the device may have changed).

void

dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,

enum dma_data_direction direction)

Unmaps the region previously mapped. All the parameters passed in

must be identical to those passed in (and returned) by the mapping

API.

dma_addr_t

dma_map_page(struct device *dev, struct page *page,

unsigned long offset, size_t size,

enum dma_data_direction direction)

void

dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,

enum dma_data_direction direction)

API for mapping and unmapping for pages. All the notes and warnings

for the other mapping APIs apply here. Also, although the <offset>

and <size> parameters are provided to do partial page mapping, it is

recommended that you never use these unless you really know what the

cache width is.

int

dma_mapping_error(struct device *dev, dma_addr_t dma_addr)

In some circumstances dma_map_single() and dma_map_page() will fail to create

a mapping. A driver can check for these errors by testing the returned

DMA address with dma_mapping_error(). A non-zero return value means the mapping

could not be created and the driver should take appropriate action (e.g.

reduce current DMA mapping usage or delay and try again later).

int

dma_map_sg(struct device *dev, struct scatterlist *sg,

int nents, enum dma_data_direction direction)

Returns: the number of bus address segments mapped (this may be shorter

than <nents> passed in if some elements of the scatter/gather list are

physically or virtually adjacent and an IOMMU maps them with a single

entry).

Please note that the sg cannot be mapped again if it has been mapped once.

The mapping process is allowed to destroy information in the sg.

As with the other mapping interfaces, dma_map_sg() can fail. When it

does, 0 is returned and a driver must take appropriate action. It is

critical that the driver do something, in the case of a block driver

aborting the request or even oopsing is better than doing nothing and

corrupting the filesystem.

With scatterlists, you use the resulting mapping like this:

int i, count = dma_map_sg(dev, sglist, nents, direction);

struct scatterlist *sg;

for_each_sg(sglist, sg, count, i) {

hw_address[i] = sg_dma_address(sg);

hw_len[i] = sg_dma_len(sg);

}

where nents is the number of entries in the sglist.

The implementation is free to merge several consecutive sglist entries

into one (e.g. with an IOMMU, or if several pages just happen to be

physically contiguous) and returns the actual number of sg entries it

mapped them to. On failure 0, is returned.

Then you should loop count times (note: this can be less than nents times)

and use sg_dma_address() and sg_dma_len() macros where you previously

accessed sg->address and sg->length as shown above.

void

dma_unmap_sg(struct device *dev, struct scatterlist *sg,

int nhwentries, enum dma_data_direction direction)

Unmap the previously mapped scatter/gather list. All the parameters

must be the same as those and passed in to the scatter/gather mapping

API.

Note: <nents> must be the number you passed in, *not* the number of

bus address entries returned.

void

dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, size_t size,

enum dma_data_direction direction)

void

dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle, size_t size,

enum dma_data_direction direction)

void

dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, int nelems,

enum dma_data_direction direction)

void

dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg, int nelems,

enum dma_data_direction direction)

Synchronise a single contiguous or scatter/gather mapping for the CPU

and device. With the sync_sg API, all the parameters must be the same

as those passed into the single mapping API. With the sync_single API,

you can use dma_handle and size parameters that aren't identical to

those passed into the single mapping API to do a partial sync.

Notes: You must do this:

- Before reading values that have been written by DMA from the device

(use the DMA_FROM_DEVICE direction)

- After writing values that will be written to the device using DMA

(use the DMA_TO_DEVICE) direction

- before *and* after handing memory to the device if the memory is

DMA_BIDIRECTIONAL

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