/*
 *  This programmer uses AT91' ADC Module
 *
 *  2010 by Ricardo V. Rojas Quispe
 */

#include <stdint.h>
#include <stdlib.h>
#include <stdio.h>
#include <unistd.h>

#include <sys/types.h>
#include <sys/stat.h>
#include <sys/mman.h>
#include <fcntl.h>

#include "./Librerias/at91adc.h"

AT91S_ADC *adc_map(unsigned int adcbase){
    int fd;
    void *base;

    AT91S_ADC *adc;

    off_t addr = adcbase;

    if ((fd = open("/dev/mem", O_RDWR | O_SYNC)) == -1) {
        fprintf(stderr, "Cannot open /dev/mem.\n");
        exit(EXIT_FAILURE);
    }


    base = mmap(0, MAP_SIZE, PROT_READ | PROT_WRITE, MAP_SHARED, fd, addr & ~MAP_MASK);

    if (base == (void *) -1) {
        fprintf(stderr, "Cannot open /dev/mem.\n");
        exit(EXIT_FAILURE);
    }


    adc = base + (addr & MAP_MASK);

    return adc;
}
/**********************Anadido por DCV*ini********/
AT91S_ADC *adc_map1(unsigned int adcbase){
    int fd;
    void *base;

    AT91S_ADC *adc;

    off_t addr = adcbase;

    if ((fd = open("/dev/mem", O_RDWR | O_SYNC)) == -1) {
        //fprintf(stderr, "Cannot open /dev/mem.\n");
        exit(EXIT_FAILURE);
    }

    base = mmap(0, MAP_SIZE, PROT_READ | PROT_WRITE, MAP_SHARED, fd, addr & ~MAP_MASK);

    if (base == (void *) -1) {
        //fprintf(stderr, "Cannot open /dev/mem.\n");
        exit(EXIT_FAILURE);
    }

    adc = base + (addr & MAP_MASK);

    return adc;
}

/*********************Anadido por DCV*fin**********/
void ADC_INIT(AT91S_ADC * adc){
	//Incia conversion ADC
	adc->ADC_CR = ADC_START;
}

void ADC_RESET(AT91S_ADC * adc){
	//Reset de ADC
	adc->ADC_CR = ADC_SWRST;
}
void CONFIG_ADC(AT91S_ADC * adc,unsigned int REG_CONFIG){
	//configura ADC
	adc->ADC_MR = REG_CONFIG;
	adc->ADC_IDR = ADC_DISABLE_INTERRUP;
}
void ENABLE_CHANNEL(AT91S_ADC * adc,unsigned int CHANNEL){
	//Habilita canal selecconado y deshabilita el resto
	adc->ADC_CHER = CHANNEL & 0x0F;
	adc->ADC_CHDR = ~CHANNEL & 0x0F;
}
unsigned int STATUS_CHANNEL(AT91S_ADC * adc){
	//Retorna el estado del canal habilitado
	return (adc->ADC_CHSR);
}
unsigned int GET_ADC(AT91S_ADC * adc){
	//unsigned int valor=1;
	//Retorna el valor de ADC (resolucion de 10BIT)
	while(1){
		if ((adc-> ADC_SR & MASK_DRDY) == MASK_DRDY)
			break;
	}
	return (adc->ADC_LCDR & ADC_LDATA);
}
unsigned int GET_STATUS(AT91S_ADC * adc){
	//Retorna el estado del ADC (registro)
	return (adc->ADC_SR);
}
unsigned int GET_ADC0(AT91S_ADC * adc){
	//Retorna el valor de la conversion del canal 0
	while(1){
		if ((adc->ADC_SR & MASK_EOC0) == MASK_EOC0)
			break;
	}
	return (adc->ADC_CDR0 & ADC_LDATA);
}
unsigned int GET_ADC1(AT91S_ADC * adc){
	//Retorna el valor de la conversion del canal 1
	while(1){
		if ((adc->ADC_SR & MASK_EOC1) == MASK_EOC1)
			break;
	}
	return (adc->ADC_CDR1 & ADC_LDATA);
}
unsigned int GET_ADC3(AT91S_ADC * adc){
	unsigned int valor=1;
	//Retorna el valor de ADC (resolucion de 10BIT)
	while(valor){
		if ((adc-> ADC_SR) & 0x10000)
			valor = 0;
		else
			valor = 1;
	}
	return (adc->ADC_CDR1 & ADC_DATA);
}
unsigned int ver_reg_mode(AT91S_ADC * adc){
	//retorna el valor del ADC_MR
	return (adc->ADC_MR);
}