Index: trunk/absroot/source/absc/Control_Module/AT91gpio_Funciones.c =================================================================== diff --git a/trunk/absroot/source/absc/Control_Module/AT91gpio_Funciones.c b/trunk/absroot/source/absc/Control_Module/AT91gpio_Funciones.c deleted file mode 10644 --- a/trunk/absroot/source/absc/Control_Module/AT91gpio_Funciones.c (revision 116) +++ /dev/null (revision 117) @@ -1,102 +0,0 @@ -/* - * This programmer uses AT91' GPIO lines - * - * 2006 by Carlos Camargo - * 2007.May.10 Andres Calderon - * 2009.Aug.26 Jose Francisco Quenta - */ - -#include -#include -#include -#include - - -#include -#include -#include -#include - -#include "./Librerias/AT91gpio_Funciones.h" - -void pio_out(AT91S_PIO * pio, int mask, unsigned long val, int opcion) -{ - if (opcion == 1) - pio->PIO_SODR = mask & val; - else - pio->PIO_CODR = mask & val; -} - - -int pio_in(AT91S_PIO * pio, int mask) -{ - return (pio->PIO_PDSR & mask); -} - - -AT91S_PIO *pio_map(unsigned int piobase) -{ - int fd; - void *base; - - AT91S_PIO *pio; - - off_t addr = piobase; - - if ((fd = open("/dev/mem", O_RDWR | O_SYNC)) == -1) { - fprintf(stderr, "Cannot open /dev/mem.\n"); - exit(EXIT_FAILURE); - } - - fprintf(stderr, "/dev/mem opened.\n"); - - base = mmap(0, MAP_SIZE, PROT_READ | PROT_WRITE, MAP_SHARED, fd, addr & ~MAP_MASK); - - if (base == (void *) -1) { - fprintf(stderr, "Cannot open /dev/mem.\n"); - exit(EXIT_FAILURE); - } - - fprintf(stderr, "Memory mapped at address %p.\n", base); - - pio = base + (addr & MAP_MASK); - - return pio; -} - - -void pio_enable(AT91S_PIO * pio, int mask) -{ - pio->PIO_PER = mask; /* Enable PIO */ -} - -void pio_output_enable(AT91S_PIO * pio, int mask) -{ - pio->PIO_OER = mask; /* Set TDI, TMS and TCK as outputs */ -} - -void pio_input_enable(AT91S_PIO * pio, int mask) -{ - pio->PIO_ODR = mask; /* Set TDO as input */ - pio->PIO_IFER = mask; /* Enable Input Filter */ -} - -void pio_disable_irq(AT91S_PIO * pio, int mask) -{ - pio->PIO_IDR = mask; /* Disable pin interrupts */ -} - -void pio_disable_multiple_driver(AT91S_PIO * pio, int mask) -{ - pio->PIO_MDDR = mask; /* Disable Multiple Diver */ -} - -void pio_disable_pull_ups(AT91S_PIO * pio, int mask) -{ - pio->PIO_PUDR = mask; /* Disable Pull-Ups */ -} - -void pio_synchronous_data_output(AT91S_PIO * pio, int mask) -{ - pio->PIO_OWDR = mask; /* Synchronous Data Output Write in PIO_ */ -} Index: trunk/absroot/source/absc/Control_Module/Librerias/AT91gpio_Funciones.h =================================================================== diff --git a/trunk/absroot/source/absc/Control_Module/Librerias/AT91gpio_Funciones.h b/trunk/absroot/source/absc/Control_Module/Librerias/AT91gpio_Funciones.h deleted file mode 10644 --- a/trunk/absroot/source/absc/Control_Module/Librerias/AT91gpio_Funciones.h (revision 116) +++ /dev/null (revision 117) @@ -1,131 +0,0 @@ -/* - * This programmer uses AT91' GPIO lines - * - * 2006 by Carlos Camargo - * 2007.May.10 Andres Calderon - * 2009.Aug.26 Jose Francisco Quenta - */ - -#ifndef ECB_AT91_H -#define ECB_AT91_H - - -#define MAP_SIZE 4096Ul -#define MAP_MASK (MAP_SIZE - 1) - -#define PIOA_BASE 0xFFFFF400 -#define PIOB_BASE 0xFFFFF600 -#define PIOC_BASE 0xFFFFF800 -#define PIOD_BASE 0xFFFFFA00 - -#define PB0 (1 << 0) -#define PB1 (1 << 1) -#define PB2 (1 << 2) -#define PB3 (1 << 3) -#define PB8 (1 << 8) -#define PB9 (1 << 9) -#define PB10 (1 << 10) -#define PB11 (1 << 11) -#define PB16 (1 << 16) -#define PB17 (1 << 17) -#define PB18 (1 << 18) -#define PB19 (1 << 19) -#define PB20 (1 << 20) -#define PB21 (1 << 21) -#define PB22 (1 << 22) -#define PB23 (1 << 23) -#define PB24 (1 << 24) -#define PB25 (1 << 25) -#define PB30 (1 << 30) -#define PB31 (1 << 31) - -#define PC0 (1 << 0) -#define PC1 (1 << 1) -#define PC4 (1 << 4) -#define PC5 (1 << 5) -#define PC6 (1 << 6) -#define PC7 (1 << 7) -#define PC8 (1 << 8) -#define PC9 (1 << 9) -#define PC10 (1 << 10) -#define PC11 (1 << 11) -#define PC16 (1 << 16) -#define PC17 (1 << 17) -#define PC18 (1 << 18) -#define PC19 (1 << 19) -#define PC20 (1 << 20) -#define PC21 (1 << 21) -#define PC22 (1 << 22) -#define PC23 (1 << 23) -#define PC24 (1 << 24) -#define PC25 (1 << 25) -#define PC26 (1 << 26) -#define PC27 (1 << 27) -#define PC28 (1 << 28) -#define PC29 (1 << 29) -#define PC30 (1 << 30) -#define PC31 (1 << 31) - - -typedef volatile unsigned int AT91_REG; -/* Hardware register definition */ - -typedef struct _AT91S_PIO { - AT91_REG PIO_PER; /* PIO Enable Register */ - AT91_REG PIO_PDR; /* PIO Disable Register */ - AT91_REG PIO_PSR; /* PIO Status Register */ - AT91_REG Reserved0[1]; - AT91_REG PIO_OER; /* Output Enable Register */ - AT91_REG PIO_ODR; /* Output Disable Registerr */ - AT91_REG PIO_OSR; /* Output Status Register */ - AT91_REG Reserved1[1]; - AT91_REG PIO_IFER; /* Input Filter Enable Register */ - AT91_REG PIO_IFDR; /* Input Filter Disable Register */ - AT91_REG PIO_IFSR; /* Input Filter Status Register */ - AT91_REG Reserved2[1]; - AT91_REG PIO_SODR; /* Set Output Data Register */ - AT91_REG PIO_CODR; /* Clear Output Data Register */ - AT91_REG PIO_ODSR; /* Output Data Status Register */ - AT91_REG PIO_PDSR; /* Pin Data Status Register */ - AT91_REG PIO_IER; /* Interrupt Enable Register */ - AT91_REG PIO_IDR; /* Interrupt Disable Register */ - AT91_REG PIO_IMR; /* Interrupt Mask Register */ - AT91_REG PIO_ISR; /* Interrupt Status Register */ - AT91_REG PIO_MDER; /* Multi-driver Enable Register */ - AT91_REG PIO_MDDR; /* Multi-driver Disable Register */ - AT91_REG PIO_MDSR; /* Multi-driver Status Register */ - AT91_REG Reserved3[1]; - AT91_REG PIO_PUDR; /* Pull-up Disable Register */ - AT91_REG PIO_PUER; /* Pull-up Enable Register */ - AT91_REG PIO_PUSR; /* Pad Pull-up Status Register */ - AT91_REG Reserved4[1]; - AT91_REG PIO_ASR; /* Select A Register */ - AT91_REG PIO_BSR; /* Select B Register */ - AT91_REG PIO_ABSR; /* AB Select Status Register */ - AT91_REG Reserved5[9]; - AT91_REG PIO_OWER; /* Output Write Enable Register */ - AT91_REG PIO_OWDR; /* Output Write Disable Register */ - AT91_REG PIO_OWSR; /* Output Write Status Register */ -} AT91S_PIO, *AT91PS_PIO; - -void pio_out(AT91S_PIO * pio, int mask, unsigned long val, int opcion); - -int pio_in(AT91S_PIO * pio, int mask); - -AT91S_PIO *pio_map(unsigned int piobase); - -void pio_enable(AT91S_PIO * pio, int mask); - -void pio_output_enable(AT91S_PIO * pio, int mask); - -void pio_input_enable(AT91S_PIO * pio, int mask); - -void pio_disable_irq(AT91S_PIO * pio, int mask); - -void pio_disable_multiple_driver(AT91S_PIO * pio, int mask); - -void pio_disable_pull_ups(AT91S_PIO * pio, int mask); - -void pio_synchronous_data_output(AT91S_PIO * pio, int mask); - -#endif Index: trunk/absroot/source/absc/Control_Module/Librerias/Mensajes.h =================================================================== diff --git a/trunk/absroot/source/absc/Control_Module/Librerias/Mensajes.h b/trunk/absroot/source/absc/Control_Module/Librerias/Mensajes.h deleted file mode 10644 --- a/trunk/absroot/source/absc/Control_Module/Librerias/Mensajes.h (revision 116) +++ /dev/null (revision 117) @@ -1,17 +0,0 @@ -/* - * Mensajes.h - * - * Created on: Nov 12, 2009 - * Author: redes - */ - -#ifndef MENSAJES_H_ -#define MENSAJES_H_ - -void LOG_SERVIDOR(char *mensaje); -void LOG_CLIENTE(char *mensaje); -void ERROR_FATAL(char *mensaje); -void ERROR(char *mensaje); - - -#endif /* MENSAJES_H_ */ Index: trunk/absroot/source/absc/Control_Module/Librerias/Mensajes.txt =================================================================== diff --git a/trunk/absroot/source/absc/Control_Module/Librerias/Mensajes.txt b/trunk/absroot/source/absc/Control_Module/Librerias/Mensajes.txt new file mode 10644 --- /dev/null (revision 0) +++ b/trunk/absroot/source/absc/Control_Module/Librerias/Mensajes.txt (revision 117) @@ -0,0 +1,17 @@ +/* + * Mensajes.h + * + * Created on: Nov 12, 2009 + * Author: redes + */ + +#ifndef MENSAJES_H_ +#define MENSAJES_H_ + +void LOG_SERVIDOR(char *mensaje); +void LOG_CLIENTE(char *mensaje); +void ERROR_FATAL(char *mensaje); +void ERROR(char *mensaje); + + +#endif /* MENSAJES_H_ */ Index: trunk/absroot/source/absc/Control_Module/Librerias/at91adc.h =================================================================== diff --git a/trunk/absroot/source/absc/Control_Module/Librerias/at91adc.h b/trunk/absroot/source/absc/Control_Module/Librerias/at91adc.h new file mode 10644 --- /dev/null (revision 0) +++ b/trunk/absroot/source/absc/Control_Module/Librerias/at91adc.h (revision 117) @@ -0,0 +1,124 @@ +// ***************************************************************************** +// SOFTWARE API DEFINITION FOR Analog to Digital Convertor +// ***************************************************************************** + +#ifndef ADC_AT91_H +#define ADC_AT91_H + +#define MAP_SIZE 4096Ul +#define MAP_MASK (MAP_SIZE - 1) + +#define ADC_BASE 0xFFFE0000 + +// -------- ADC_CR : (ADC Offset: 0x0) ADC Control Register -------- +#define ADC_SWRST ((unsigned int) 0x1 << 0) // (ADC) Software Reset +#define ADC_START ((unsigned int) 0x1 << 1) // (ADC) Start Conversion +// -------- ADC_MR : (ADC Offset: 0x4) ADC Mode Register -------- +#define ADC_TRGEN_DIS ((unsigned int) 0x0) // (ADC) Hradware triggers are disabled. Starting a conversion is only possible by software +#define ADC_TRGEN_EN ((unsigned int) 0x1) // (ADC) Hardware trigger selected by TRGSEL field is enabled. + +#define ADC_TRGSEL_TIOA0 ((unsigned int) 0x0 << 1) // (ADC) Selected TRGSEL = TIAO0 +#define ADC_TRGSEL_TIOA1 ((unsigned int) 0x1 << 1) // (ADC) Selected TRGSEL = TIAO1 +#define ADC_TRGSEL_TIOA2 ((unsigned int) 0x2 << 1) // (ADC) Selected TRGSEL = TIAO2 +#define ADC_TRGSEL_TIOA3 ((unsigned int) 0x3 << 1) // (ADC) Selected TRGSEL = TIAO3 +#define ADC_TRGSEL_TIOA4 ((unsigned int) 0x4 << 1) // (ADC) Selected TRGSEL = TIAO4 +#define ADC_TRGSEL_TIOA5 ((unsigned int) 0x5 << 1) // (ADC) Selected TRGSEL = TIAO5 +#define ADC_TRGSEL_EXT ((unsigned int) 0x6 << 1) // (ADC) Selected TRGSEL = External Trigger + +#define ADC_RES_10BIT ((unsigned int) 0x0 << 4) // (ADC) 10-bit resolution +#define ADC_RES_8BIT ((unsigned int) 0x1 << 4) // (ADC) 8-bit resolution + +#define ADC_SLEEP_NORMAL_MODE ((unsigned int) 0x0 << 5) // (ADC) Normal Mode +#define ADC_SLEEP_MODE ((unsigned int) 0x1 << 5) // (ADC) Sleep Mode + +#define ADC_PRESCAL ((unsigned int) 0x31 << 2) // (ADC) Prescaler rate selection +#define ADC_STARTUP ((unsigned int) 0x00 << 2) // (ADC) Startup Time +#define ADC_SHTIM ((unsigned int) 0x01 << 9) // (ADC) Sample & Hold Time + +// -------- ADC_CHER : (ADC Offset: 0x10) ADC Channel Enable Register -------- +#define ADC_CH0 ((unsigned int) 0x1 << 0) // (ADC) Channel 0 +#define ADC_CH1 ((unsigned int) 0x1 << 1) // (ADC) Channel 1 +#define ADC_CH2 ((unsigned int) 0x1 << 2) // (ADC) Channel 2 +#define ADC_CH3 ((unsigned int) 0x1 << 3) // (ADC) Channel 3 + +/*Anadido por DCordova*/ +// -------- ADC_CHSR : (ADC Offset: 0x10) ADC Channel Status Register -------- +#define ADC_CHSR0 ((unsigned int) 0x1 << 0) // (ADC) Channel 0 +#define ADC_CHSR1 ((unsigned int) 0x1 << 1) // (ADC) Channel 1 +#define ADC_CHSR2 ((unsigned int) 0x1 << 2) // (ADC) Channel 2 +#define ADC_CHSR3 ((unsigned int) 0x1 << 3) // (ADC) Channel 3 +/*Anadido por DCordova*/ + + +// -------- ADC_CHDR : (ADC Offset: 0x14) ADC Channel Disable Register -------- +// -------- ADC_CHSR : (ADC Offset: 0x18) ADC Channel Status Register -------- +// -------- ADC_SR : (ADC Offset: 0x1c) ADC Status Register -------- + +#define MASK_EOC0 ((unsigned int) 0x1 << 0) // (ADC) End of Conversion +#define MASK_EOC1 ((unsigned int) 0x1 << 1) // (ADC) End of Conversion +#define MASK_EOC2 ((unsigned int) 0x1 << 2) // (ADC) End of Conversion +#define MASK_EOC3 ((unsigned int) 0x1 << 3) // (ADC) End of Conversion +#define MASK_OVRE0 ((unsigned int) 0x1 << 8) // (ADC) Overrun Error +#define MASK_OVRE1 ((unsigned int) 0x1 << 9) // (ADC) Overrun Error +#define MASK_OVRE2 ((unsigned int) 0x1 << 10) // (ADC) Overrun Error +#define MASK_OVRE3 ((unsigned int) 0x1 << 11) // (ADC) Overrun Error +#define MASK_DRDY ((unsigned int) 0x1 << 16) // (ADC) Data Ready +#define MASK_GOVRE ((unsigned int) 0x1 << 17) // (ADC) General Overrun + +// -------- ADC_LCDR : (ADC Offset: 0x20) ADC Last Converted Data Register -------- +#define ADC_LDATA ((unsigned int) 0x3FF << 0) // (ADC) Last Data Converted +#define ADC_DATA ((unsigned int) 0x3FF << 0) // (ADC) Converted Data +#define ADC_DISABLE_INTERRUP ((unsigned int) 0x0F0F0F << 0) //(ADC) Disable all interrup + +typedef volatile unsigned int AT91_REG2;// Hardware register definition + +typedef struct _AT91S_ADC { + AT91_REG2 ADC_CR; // ADC Control Register + AT91_REG2 ADC_MR; // ADC Mode Register + AT91_REG2 Reserved0[2]; // + AT91_REG2 ADC_CHER; // ADC Channel Enable Register + AT91_REG2 ADC_CHDR; // ADC Channel Disable Register + AT91_REG2 ADC_CHSR; // ADC Channel Status Register + AT91_REG2 ADC_SR; // ADC Status Register + AT91_REG2 ADC_LCDR; // ADC Last Converted Data Register + AT91_REG2 ADC_IER; // ADC Interrupt Enable Register + AT91_REG2 ADC_IDR; // ADC Interrupt Disable Register + AT91_REG2 ADC_IMR; // ADC Interrupt Mask Register + AT91_REG2 ADC_CDR0; // ADC Channel Data Register 0 + AT91_REG2 ADC_CDR1; // ADC Channel Data Register 1 + AT91_REG2 ADC_CDR2; // ADC Channel Data Register 2 + AT91_REG2 ADC_CDR3; // ADC Channel Data Register 3 + AT91_REG2 ADC_CDR4; // ADC Channel Data Register 4 + AT91_REG2 ADC_CDR5; // ADC Channel Data Register 5 + AT91_REG2 ADC_CDR6; // ADC Channel Data Register 6 + AT91_REG2 ADC_CDR7; // ADC Channel Data Register 7 + AT91_REG2 Reserved1[44]; // + AT91_REG2 ADC_RPR; // Receive Pointer Register + AT91_REG2 ADC_RCR; // Receive Counter Register + AT91_REG2 ADC_TPR; // Transmit Pointer Register + AT91_REG2 ADC_TCR; // Transmit Counter Register + AT91_REG2 ADC_RNPR; // Receive Next Pointer Register + AT91_REG2 ADC_RNCR; // Receive Next Counter Register + AT91_REG2 ADC_TNPR; // Transmit Next Pointer Register + AT91_REG2 ADC_TNCR; // Transmit Next Counter Register + AT91_REG2 ADC_PTCR; // PDC Transfer Control Register + AT91_REG2 ADC_PTSR; // PDC Transfer Status Register +} AT91S_ADC, *AT91PS_ADC; + +AT91S_ADC *adc_map(unsigned int adcbase); +/**********************Aniadido por DCV*********/ +AT91S_ADC *adc_map1(unsigned int adcbase); +/**********************Aniadido por DCV*********/ + +void ADC_INIT(AT91S_ADC * adc); +void ADC_RESET(AT91S_ADC * adc); +void CONFIG_ADC(AT91S_ADC * adc,unsigned int REG_CONFIG); +void ENABLE_CHANNEL(AT91S_ADC * adc,unsigned int CHANNEL); +unsigned int STATUS_CHANNEL(AT91S_ADC * adc); +unsigned int GET_ADC(AT91S_ADC * adc); +unsigned int GET_ADC0(AT91S_ADC * adc); +unsigned int GET_ADC1(AT91S_ADC * adc); +unsigned int GET_ADC3(AT91S_ADC * adc); +unsigned int ver_reg_mode(AT91S_ADC * adc); +unsigned int GET_STATUS(AT91S_ADC * adc); +#endif Index: trunk/absroot/source/absc/Control_Module/Librerias/at91gpio.h =================================================================== diff --git a/trunk/absroot/source/absc/Control_Module/Librerias/at91gpio.h b/trunk/absroot/source/absc/Control_Module/Librerias/at91gpio.h new file mode 10644 --- /dev/null (revision 0) +++ b/trunk/absroot/source/absc/Control_Module/Librerias/at91gpio.h (revision 117) @@ -0,0 +1,137 @@ +/* + * This programmer uses AT91' GPIO lines + * + * 2006 by Carlos Camargo + * 2007.May.10 Andres Calderon + * 2009.Aug.26 Jose Francisco Quenta + */ + +#ifndef ECB_AT91_H +#define ECB_AT91_H + + +#define MAP_SIZE 4096Ul +#define MAP_MASK (MAP_SIZE - 1) + +#define PIOA_BASE 0xFFFFF400 +#define PIOB_BASE 0xFFFFF600 +#define PIOC_BASE 0xFFFFF800 +#define PIOD_BASE 0xFFFFFA00 + +#define PB0 (1 << 0) +#define PB1 (1 << 1) +#define PB2 (1 << 2) +#define PB3 (1 << 3) +#define PB8 (1 << 8) +#define PB9 (1 << 9) +#define PB10 (1 << 10) +#define PB11 (1 << 11) +#define PB16 (1 << 16) +#define PB17 (1 << 17) +#define PB18 (1 << 18) +#define PB19 (1 << 19) +#define PB20 (1 << 20) +#define PB21 (1 << 21) +#define PB22 (1 << 22) +#define PB23 (1 << 23) +#define PB24 (1 << 24) +#define PB25 (1 << 25) +#define PB30 (1 << 30) +#define PB31 (1 << 31) + +#define PC0 (1 << 0) +#define PC1 (1 << 1) +#define PC4 (1 << 4) +#define PC5 (1 << 5) +#define PC6 (1 << 6) +#define PC7 (1 << 7) +#define PC8 (1 << 8) +#define PC9 (1 << 9) +#define PC10 (1 << 10) +#define PC11 (1 << 11) +#define PC16 (1 << 16) +#define PC17 (1 << 17) +#define PC18 (1 << 18) +#define PC19 (1 << 19) +#define PC20 (1 << 20) +#define PC21 (1 << 21) +#define PC22 (1 << 22) +#define PC23 (1 << 23) +#define PC24 (1 << 24) +#define PC25 (1 << 25) +#define PC26 (1 << 26) +#define PC27 (1 << 27) +#define PC28 (1 << 28) +#define PC29 (1 << 29) +#define PC30 (1 << 30) +#define PC31 (1 << 31) + + +typedef volatile unsigned int AT91_REG; +/* Hardware register definition */ + +typedef struct _AT91S_PIO { + AT91_REG PIO_PER; /* PIO Enable Register */ + AT91_REG PIO_PDR; /* PIO Disable Register */ + AT91_REG PIO_PSR; /* PIO Status Register */ + AT91_REG Reserved0[1]; + AT91_REG PIO_OER; /* Output Enable Register */ + AT91_REG PIO_ODR; /* Output Disable Registerr */ + AT91_REG PIO_OSR; /* Output Status Register */ + AT91_REG Reserved1[1]; + AT91_REG PIO_IFER; /* Input Filter Enable Register */ + AT91_REG PIO_IFDR; /* Input Filter Disable Register */ + AT91_REG PIO_IFSR; /* Input Filter Status Register */ + AT91_REG Reserved2[1]; + AT91_REG PIO_SODR; /* Set Output Data Register */ + AT91_REG PIO_CODR; /* Clear Output Data Register */ + AT91_REG PIO_ODSR; /* Output Data Status Register */ + AT91_REG PIO_PDSR; /* Pin Data Status Register */ + AT91_REG PIO_IER; /* Interrupt Enable Register */ + AT91_REG PIO_IDR; /* Interrupt Disable Register */ + AT91_REG PIO_IMR; /* Interrupt Mask Register */ + AT91_REG PIO_ISR; /* Interrupt Status Register */ + AT91_REG PIO_MDER; /* Multi-driver Enable Register */ + AT91_REG PIO_MDDR; /* Multi-driver Disable Register */ + AT91_REG PIO_MDSR; /* Multi-driver Status Register */ + AT91_REG Reserved3[1]; + AT91_REG PIO_PUDR; /* Pull-up Disable Register */ + AT91_REG PIO_PUER; /* Pull-up Enable Register */ + AT91_REG PIO_PUSR; /* Pad Pull-up Status Register */ + AT91_REG Reserved4[1]; + AT91_REG PIO_ASR; /* Select A Register */ + AT91_REG PIO_BSR; /* Select B Register */ + AT91_REG PIO_ABSR; /* AB Select Status Register */ + AT91_REG Reserved5[9]; + AT91_REG PIO_OWER; /* Output Write Enable Register */ + AT91_REG PIO_OWDR; /* Output Write Disable Register */ + AT91_REG PIO_OWSR; /* Output Write Status Register */ +} AT91S_PIO, *AT91PS_PIO; + +void pio_out(AT91S_PIO * pio, int mask, unsigned long val, int opcion); + +int pio_in(AT91S_PIO * pio, int mask); + +AT91S_PIO *pio_map(unsigned int piobase); + +void pio_enable(AT91S_PIO * pio, int mask); + +void pio_output_enable(AT91S_PIO * pio, int mask); + +void pio_input_enable(AT91S_PIO * pio, int mask); + +void pio_disable_irq(AT91S_PIO * pio, int mask); + +void pio_disable_multiple_driver(AT91S_PIO * pio, int mask); + +void pio_disable_pull_ups(AT91S_PIO * pio, int mask); + +void pio_synchronous_data_output(AT91S_PIO * pio, int mask); + +//funciones agregadas para la realizar el estado de algunos registros: +int ver_registro(AT91S_PIO * pio); +void pin_adc_enable(AT91S_PIO * pio, int mask); +void periferico_a(AT91S_PIO * pio, int mask); +int ver_periferico(AT91S_PIO * pio); + +#endif Index: trunk/absroot/source/absc/Control_Module/Librerias/at91sysclock.h =================================================================== diff --git a/trunk/absroot/source/absc/Control_Module/Librerias/at91sysclock.h b/trunk/absroot/source/absc/Control_Module/Librerias/at91sysclock.h new file mode 10644 --- /dev/null (revision 0) +++ b/trunk/absroot/source/absc/Control_Module/Librerias/at91sysclock.h (revision 117) @@ -0,0 +1,83 @@ +// ***************************************************************************** +// SOFTWARE API DEFINITION FOR Power Management Controler +// ***************************************************************************** +#ifndef SYSCLOCK_AT91_H +#define SYSCLOCK_AT91_H + +#define MAP_SIZE 4096Ul +#define MAP_MASK (MAP_SIZE - 1) + +#define CLOCK_BASE 0xFFFFFC00 +// -------- PMC_SCER : (PMC Offset: 0x0) System Clock Enable Register -------- +#define AT91C_PMC_PCK ((unsigned int) 0x1 << 0) // (PMC) Processor Clock +#define AT91C_PMC_UHP ((unsigned int) 0x1 << 6) // (PMC) USB Host Port Clock +#define AT91C_PMC_UDP ((unsigned int) 0x1 << 7) // (PMC) USB Device Port Clock +#define AT91C_PMC_PCK0 ((unsigned int) 0x1 << 8) // (PMC) Programmable Clock Output +#define AT91C_PMC_PCK1 ((unsigned int) 0x1 << 9) // (PMC) Programmable Clock Output +#define AT91C_PMC_HCK0 ((unsigned int) 0x1 << 16) // (PMC) AHB UHP Clock Output +#define AT91C_PMC_HCK1 ((unsigned int) 0x1 << 17) // (PMC) AHB LCDC Clock Output +// -------- PMC_SCDR : (PMC Offset: 0x4) System Clock Disable Register -------- +// -------- PMC_SCSR : (PMC Offset: 0x8) System Clock Status Register -------- +// -------- CKGR_MOR : (PMC Offset: 0x20) Main Oscillator Register -------- +// -------- CKGR_MCFR : (PMC Offset: 0x24) Main Clock Frequency Register -------- +// -------- CKGR_PLLAR : (PMC Offset: 0x28) PLL A Register -------- +// -------- CKGR_PLLBR : (PMC Offset: 0x2c) PLL B Register -------- +// -------- PMC_MCKR : (PMC Offset: 0x30) Master Clock Register -------- +#define AT91C_PMC_CSS ((unsigned int) 0x3 << 0) // (PMC) Programmable Clock Selection +#define AT91C_PMC_CSS_SLOW_CLK ((unsigned int) 0x0) // (PMC) Slow Clock is selected +#define AT91C_PMC_CSS_MAIN_CLK ((unsigned int) 0x1) // (PMC) Main Clock is selected +#define AT91C_PMC_CSS_PLLA_CLK ((unsigned int) 0x2) // (PMC) Clock from PLL A is selected +#define AT91C_PMC_CSS_PLLB_CLK ((unsigned int) 0x3) // (PMC) Clock from PLL B is selected +#define AT91C_PMC_PRES ((unsigned int) 0x7 << 2) // (PMC) Programmable Clock Prescaler +#define AT91C_PMC_PRES_CLK ((unsigned int) 0x0 << 2) // (PMC) Selected clock +#define AT91C_PMC_PRES_CLK_2 ((unsigned int) 0x1 << 2) // (PMC) Selected clock divided by 2 +#define AT91C_PMC_PRES_CLK_4 ((unsigned int) 0x2 << 2) // (PMC) Selected clock divided by 4 +#define AT91C_PMC_PRES_CLK_8 ((unsigned int) 0x3 << 2) // (PMC) Selected clock divided by 8 +#define AT91C_PMC_PRES_CLK_16 ((unsigned int) 0x4 << 2) // (PMC) Selected clock divided by 16 +#define AT91C_PMC_PRES_CLK_32 ((unsigned int) 0x5 << 2) // (PMC) Selected clock divided by 32 +#define AT91C_PMC_PRES_CLK_64 ((unsigned int) 0x6 << 2) // (PMC) Selected clock divided by 64 +#define AT91C_PMC_MDIV ((unsigned int) 0x3 << 8) // (PMC) Master Clock Division +#define AT91C_PMC_MDIV_1 ((unsigned int) 0x0 << 8) // (PMC) The master clock and the processor clock are the same +#define AT91C_PMC_MDIV_2 ((unsigned int) 0x1 << 8) // (PMC) The processor clock is twice as fast as the master clock +#define AT91C_PMC_MDIV_3 ((unsigned int) 0x2 << 8) // (PMC) The processor clock is four times faster than the master clock +// -------- PMC_PCKR : (PMC Offset: 0x40) Programmable Clock Register -------- +// -------- PMC_IER : (PMC Offset: 0x60) PMC Interrupt Enable Register -------- +#define AT91C_PMC_MOSCS ((unsigned int) 0x1 << 0) // (PMC) MOSC Status/Enable/Disable/Mask +#define AT91C_PMC_LOCKA ((unsigned int) 0x1 << 1) // (PMC) PLL A Status/Enable/Disable/Mask +#define AT91C_PMC_LOCKB ((unsigned int) 0x1 << 2) // (PMC) PLL B Status/Enable/Disable/Mask +#define AT91C_PMC_MCKRDY ((unsigned int) 0x1 << 3) // (PMC) Master Clock Status/Enable/Disable/Mask +#define AT91C_PMC_PCK0RDY ((unsigned int) 0x1 << 8) // (PMC) PCK0_RDY Status/Enable/Disable/Mask +#define AT91C_PMC_PCK1RDY ((unsigned int) 0x1 << 9) // (PMC) PCK1_RDY Status/Enable/Disable/Mask +// -------- PMC_IDR : (PMC Offset: 0x64) PMC Interrupt Disable Register -------- +// -------- PMC_SR : (PMC Offset: 0x68) PMC Status Register -------- +// -------- PMC_IMR : (PMC Offset: 0x6c) PMC Interrupt Mask Register -------- + +typedef volatile unsigned int AT91_REG3;// Hardware register definition +typedef struct _AT91S_PMC { + AT91_REG3 PMC_SCER; // System Clock Enable Register + AT91_REG3 PMC_SCDR; // System Clock Disable Register + AT91_REG3 PMC_SCSR; // System Clock Status Register + AT91_REG3 Reserved0[1]; // + AT91_REG3 PMC_PCER; // Peripheral Clock Enable Register + AT91_REG3 PMC_PCDR; // Peripheral Clock Disable Register + AT91_REG3 PMC_PCSR; // Peripheral Clock Status Register + AT91_REG3 Reserved1[1]; // + AT91_REG3 PMC_MOR; // Main Oscillator Register + AT91_REG3 PMC_MCFR; // Main Clock Frequency Register + AT91_REG3 PMC_PLLAR; // PLL A Register + AT91_REG3 PMC_PLLBR; // PLL B Register + AT91_REG3 PMC_MCKR; // Master Clock Register + AT91_REG3 Reserved2[3]; // + AT91_REG3 PMC_PCKR[8]; // Programmable Clock Register + AT91_REG3 PMC_IER; // Interrupt Enable Register + AT91_REG3 PMC_IDR; // Interrupt Disable Register + AT91_REG3 PMC_SR; // Status Register + AT91_REG3 PMC_IMR; // Interrupt Mask Register +} AT91S_PMC, *AT91PS_PMC; + +//Funciones: +AT91S_PMC *clock_map(unsigned int clockbase); +void enable_clock_adc(AT91S_PMC * clock); +unsigned int status_clock_adc(AT91S_PMC * clock); +#endif + Index: trunk/absroot/source/absc/Control_Module/Mensajes.c =================================================================== diff --git a/trunk/absroot/source/absc/Control_Module/Mensajes.c b/trunk/absroot/source/absc/Control_Module/Mensajes.c deleted file mode 10644 --- a/trunk/absroot/source/absc/Control_Module/Mensajes.c (revision 116) +++ /dev/null (revision 117) @@ -1,39 +0,0 @@ -/* - * Mensajes.c - * - * Created on: Nov 12, 2009 - * Author: Jose Francisco Quenta - */ - -#include -#include - -/* - * Imprime mensajes del servidor - */ -void LOG_SERVIDOR(char *mensaje){ - printf("SERVIDOR: %s\n",mensaje); -} - -/* - * Imprime mensajes del cliente - */ -void LOG_CLIENTE(char *mensaje){ - printf("CLIENTE: %s\n",mensaje); -} - -/* - * Error no fatal, permite la continuación del programa - */ -void ERROR(char *mensaje){ - fprintf(stderr, "ERROR. %s\n", mensaje); -} - -/* - * Error fatal, aborta la ejecución del programa con código de salida de error - */ -void ERROR_FATAL(char *mensaje){ - fprintf(stderr, "ERROR FATAL. %s\n", mensaje); - exit(EXIT_FAILURE); -} - Index: trunk/absroot/source/absc/Control_Module/Mensajes.txt =================================================================== diff --git a/trunk/absroot/source/absc/Control_Module/Mensajes.txt b/trunk/absroot/source/absc/Control_Module/Mensajes.txt new file mode 10644 --- /dev/null (revision 0) +++ b/trunk/absroot/source/absc/Control_Module/Mensajes.txt (revision 117) @@ -0,0 +1,39 @@ +/* + * Mensajes.c + * + * Created on: Nov 12, 2009 + * Author: Jose Francisco Quenta + */ + +#include +#include + +/* + * Imprime mensajes del servidor + */ +void LOG_SERVIDOR(char *mensaje){ + printf("SERVIDOR: %s\n",mensaje); +} + +/* + * Imprime mensajes del cliente + */ +void LOG_CLIENTE(char *mensaje){ + printf("CLIENTE: %s\n",mensaje); +} + +/* + * Error no fatal, permite la continuación del programa + */ +void ERROR(char *mensaje){ + fprintf(stderr, "ERROR. %s\n", mensaje); +} + +/* + * Error fatal, aborta la ejecución del programa con código de salida de error + */ +void ERROR_FATAL(char *mensaje){ + fprintf(stderr, "ERROR FATAL. %s\n", mensaje); + exit(EXIT_FAILURE); +} + Index: trunk/absroot/source/absc/Control_Module/ServidorTCP.c =================================================================== diff --git a/trunk/absroot/source/absc/Control_Module/ServidorTCP.c b/trunk/absroot/source/absc/Control_Module/ServidorTCP.c --- a/trunk/absroot/source/absc/Control_Module/ServidorTCP.c (revision 116) +++ b/trunk/absroot/source/absc/Control_Module/ServidorTCP.c (revision 117) @@ -25,9 +25,14 @@ #include #include #include - -#include "./Librerias/AT91gpio_Funciones.h" -#include "./Librerias/Mensajes.h" +#include +#include + +#include "./Librerias/at91gpio.h" +//#include "./Librerias/Mensajes.h" +#include "./Librerias/at91adc.h" +//clock +#include "./Librerias/at91sysclock.h" #define PUERTO_SERVIDOR 5500 #define TAM_BUFFER 1024 @@ -45,6 +50,22 @@ #define MyID 11 #define MAXPENDING 5 /* Maximum outstanding connection requests */ + +//parameters for the name of the output file +#define FPRE "AD" //prefix for the output file name +#define FEXT ".out" //file extension for the output file +#define FNAMELEN 40 + +//ADC parameters +#define REP 1 //defines how many times the data acquisation loop is repeated +#define NSAMPLES 100 //defines how many samples are taken in one data acqu- + // isation loop +#define CNVTIME 14.3 //defines how long it takes to get one sample. Value + // is only needed for the output file, doesn't change + // any ADC configurations +#define UREF 3.3 //Reference Voltage of ADC (max. ADC Voltage) +#define ADCRES 1023 //Resolution of ADC (10bit=1023) + char *buff_experimento= NULL; @@ -86,6 +107,25 @@ void SplitFrame(char *frame); void intToStr( int number, char* str ); +//ABS monitoring +int ABS_monitoreo(int sel_atenuador, int sel_calibracion, float umbral, int pulsewidth); + +AT91S_ADC * configADC1(void); +AT91S_ADC * configADC2(void); + +FILE * create_Output(char*, time_t); + +void writeOutput(float resultado, FILE * output); + +int checkTx(long int results1[],long int results2[], float umbral, int pulsewidth); + +double mediana(long int *results, unsigned int cuenta); +float getPhase(long int results1[], long int results2[]); + +int fExists(char *); +int configCLK(); +// + /* * */ @@ -138,14 +178,16 @@ /* Se establece el socket */ servSocket = socket(AF_INET,SOCK_STREAM, IPPROTO_TCP); if (servSocket == -1){ - ERROR_FATAL("No se establecio correctamente el socket: socket()\n"); + printf("No se establecio correctamente el socket: socket()\n"); + //ERROR_FATAL("No se establecio correctamente el socket: socket()\n"); exit(-1); } /* Se asocia el socket a un puerto y una IP */ resultado = bind(servSocket,(struct sockaddr *)&inf_servidor,sizeof(inf_servidor)); if (resultado== -1){ - ERROR_FATAL("No se establecio correctamente el socket: bind()\n"); + printf("No se establecio correctamente el socket: bind()\n"); + //ERROR_FATAL("No se establecio correctamente el socket: bind()\n"); exit(-1); } @@ -287,7 +329,9 @@ SplitFrame(rx_buffer); if ((cmd == NULL) || (rx_data == NULL)){ - ERROR("procesarPeticion: formato de mensaje incorrecto"); + printf("procesarPeticion: formato de mensaje incorrecto"); + //ERROR("procesarPeticion: formato de mensaje incorrecto"); + } else{ if(strcmp(cmd,"SNDF") == 0){ @@ -304,6 +348,7 @@ } else if(strcmp(cmd,"ANST") == 0){ tx_data = chequeo_sistema(filename2,rx_data); + ABS_monitoreo(1, 1, 50, 10); printf("%s\n",tx_data); } else if(strcmp(cmd,"NTST") == 0){ @@ -314,7 +359,8 @@ else{ tx_data = (char*)malloc(6); tx_data = "Error"; - ERROR("procesa_peticion: comando no reconocido"); + printf("procesa_peticion: comando no reconocido"); + //ERROR("procesa_peticion: comando no reconocido"); } tx_len = malloc(7); @@ -370,7 +416,8 @@ Archivo_Fd = fopen(nombre_archivo,"r"); // Se procede a abrir el archivo, segun la ruta especificada if(!Archivo_Fd){ - ERROR("carga_archivo: No se pudo abrir el archivo!!! --> fopen()\n"); + printf("carga_archivo: No se pudo abrir el archivo!!! --> fopen()\n"); + //ERROR("carga_archivo: No se pudo abrir el archivo!!! --> fopen()\n"); return -1; }else{ @@ -559,3 +606,418 @@ str[(index-1)-position] = tmp; } } + + +//***************************************************************** +//ABS_monitoreo es la funci�n principal del proyecto ABS_Monitoreo. +//Esta funci�n es la que se debe agregar en otros c�digos. +//***************************************************************** +int ABS_monitoreo(int sel_atenuador, int sel_calibracion, float umbral, int pulsewidth){ + + //local variables + AT91S_PIO *pioc; + pioc = pio_map(PIOC_BASE); + unsigned int mask_sel_canal =PC4; //Aqu� se indican los pines que se desean usar como salidas. Las constantes PCx est�n defiidas en el header at91gpio.h + unsigned int mask_sel_atenuacion =PC5; + unsigned int mask_sel_calibracion =PC6; + AT91S_ADC *padc; + AT91S_ADC *padd; + FILE *fp; + long int results1[NSAMPLES], results2[NSAMPLES], results3[NSAMPLES], results4[NSAMPLES]; + unsigned int i=0; + char fname[FNAMELEN]; + int j=0; + time_t now; + FILE *archivo; + float phase1; + float phase2; + //system("./map_clock"); + + if (configCLK() == 1) + printf("clock ADC enable.\n"); + + + //configurar tres pines como salida usando als m�scaras mask_sel_canal, mask_sel_atenuacion y mask_sel_calibracion. En este caso corresponden a los pines pc4, pc5 y pc6. + pio_enable(pioc, mask_sel_canal); + pio_enable(pioc, mask_sel_atenuacion); + pio_enable(pioc, mask_sel_calibracion); + pio_output_enable(pioc, mask_sel_canal); //configurar pc4 como salida + pio_output_enable(pioc, mask_sel_atenuacion); //configurar pc5 como salida + pio_output_enable(pioc, mask_sel_calibracion); //configurar pc6 como salida + + + //Se modifican las salidas correspondientes a la selecci�n del atenuador y calibraci�n, de acuerdo a los par�metros ingresados en la funci�n ABS_monitoreo. + pio_out(pioc, mask_sel_atenuacion, sel_atenuador,1); + pio_out(pioc, mask_sel_calibracion, sel_calibracion,1); + + + strcpy (fname, "/mnt/sd/archivos/absmonitoreo.txt"); //Direcci�n y nombre del archivo donde se desea guardar los datos. + + if (fExists(fname)==0){ //si el archivo no existe, crea uno y le asigna el titulo + archivo = fopen(fname,"a+"); + fprintf(archivo,"%s"," Registro de datos del ABS Control \n"); + fprintf(archivo,"%s"," Fecha y hora Fase UP Fase DOWN\n"); + fclose(archivo); + } + + + //configure ADC Settings + padc=configADC1(); + padd=configADC2(); + + while (1){ + + ENABLE_CHANNEL(padc, ADC_CH0+ADC_CH1); + printf("\nAdquiriendo datos...\n"); //Indica en el terminal que se est�n adquiriendo datos (muestreando la se�al). + + + now = time(0); //Get current Time for File Name + + + //Se pone la salida de selecci�n de canal para seleccionar el canal 1 del detector de fase + pio_out(pioc, mask_sel_canal, 0,1); + + + //Se toman muestras para el canal 1 del detector de fase + while(1){ + for(i=0; i < NSAMPLES; i++){ + + ADC_INIT(padc); + results1[i] = GET_ADC0(padc); + results2[i] = GET_ADC1(padd); + } + + + if (checkTx(results1, results2, umbral, pulsewidth)==1){ //Se verifica que las muestras tomadas del canal 1 del datector de fase //correspondan a un pulso. + break; + } + } + + + //Se pone la salida de selecci�n de canal para seleccionar el canal 2 del detector de fase + pio_out(pioc, mask_sel_canal, 1,1); + + + + //Setoman muestras para el canal 2 del detector de fase + while(1){ + for(i=0; i < NSAMPLES; i++){ + + ADC_INIT(padc); + results3[i] = GET_ADC0(padc); + results4[i] = GET_ADC1(padd); + } + + if (checkTx(results3, results4, umbral, pulsewidth)==1){ //Se verifica que las muestras tomadas del canal 2 del detector de fase //correspondan a un pulso. + break; + } + } + + + //Una vez que se ha encontrado un pulso en cada canal, se calcula la fase de ambos. + + phase1 = getPhase(results1, results2); //Calcular la fase del canal 1 del detector de fase. + phase2 = getPhase(results3, results4); //Calcular la fase del canal 2 del detector de fase. + //create Output File + + strcpy (fname, "/mnt/sd/archivos/absmonitoreo.txt"); + printf("\nTerminada la prueba # %d \n", j++); + fp=create_Output(fname, now); //Coloca la fecha y la hora en el archivo de texto + printf("mediana ch1 = %1.2f\n", phase1); //muestra resultado en terminal + printf("mediana ch2 = %1.2f\n", phase2); //muestra resultado en terminal + writeOutput(phase1, fp); //graba el resultado en el archivo de texto + writeOutput(phase2, fp); //graba el resultado en el archivo de texto + fprintf(fp, "\n"); //Pasa a la siguiente l�nea del archivo de texto + fclose(fp); + printf("Resultado guardado en %s \n", fname); + + sleep(1); + + } + return 0; +} +/*============================================================================= + Function definitions +=============================================================================*/ + +// Configures ADC registers in order to get a sample every 10us +AT91S_ADC * configADC1(void){ +//Variables a usar: + unsigned int maskc_adc =PC0; //Usamos ADC0 y ADC1 + +//configuro pin: + AT91S_PIO *pioc; + pioc = pio_map(PIOC_BASE); + pin_adc_enable(pioc,maskc_adc); //Habilitamos PC0 para usar con ADC0 y 1 + pio_disable_irq(pioc, maskc_adc); + pio_disable_multiple_driver(pioc, maskc_adc); + pio_disable_pull_ups(pioc, maskc_adc); + pio_input_enable(pioc, maskc_adc); + + +//Configuro el ADC: + AT91S_ADC *padc; + + padc = adc_map1(ADC_BASE); + + //clock ADC = 1MHz + //time startup = 8us + //time sample and hold = 2us + // hold + // ___________ + // start ___________| |___________ + // + // | --1.2us-- | --0.15us-- | + //ADC_RESET(padc); + CONFIG_ADC(padc,ADC_TRGEN_DIS | ADC_RES_10BIT | ADC_SLEEP_NORMAL_MODE | ADC_PRESCAL | ADC_STARTUP | ADC_SHTIM); + ENABLE_CHANNEL(padc,ADC_CH0); //habilito canal 0 + + + return padc; +} + +AT91S_ADC * configADC2(void){ +//Variables a usar: + unsigned int maskc_adc =PC1; //Usamos ADC0 y ADC1 + +//configuro pin: + AT91S_PIO *piod; + piod = pio_map(PIOC_BASE); + pin_adc_enable(piod,maskc_adc); //Habilitamos PC0 para usar con ADC0 y 1 + pio_disable_irq(piod, maskc_adc); + pio_disable_multiple_driver(piod, maskc_adc); + pio_disable_pull_ups(piod, maskc_adc); + pio_input_enable(piod, maskc_adc); + +//Configuro el ADC: + AT91S_ADC *padd; + + padd = adc_map1(ADC_BASE); + + //clock ADC = 1MHz + //time startup = 8us + //time sample and hold = 2us + // hold + // ___________ + // start ___________| |___________ + // + // | --1.2us-- | --0.15us-- | + //ADC_RESET(padc); + CONFIG_ADC(padd,ADC_TRGEN_DIS | ADC_RES_10BIT | ADC_SLEEP_NORMAL_MODE | ADC_PRESCAL | ADC_STARTUP | ADC_SHTIM); + ENABLE_CHANNEL(padd,ADC_CH1); //habilito canal 1 + return padd; +} + + +//++++++++++++++++++++ + +//creats the output file with a timestamp in the name +FILE * create_Output(char *fname, time_t rawtime){ + FILE *file; + char timestamp[80];//, counter[5]="dcv"; + //char str[4]; + struct tm * timeinfo; + + //format time + timeinfo = localtime ( &rawtime ); + strftime (timestamp,sizeof(timestamp),"%a %y-%m-%d %H:%M:%S %Z",timeinfo); + + + //Creates the file name out of the #define parameters + + strcpy (fname, "/mnt/sd/archivos/absmonitoreo.txt"); + file = fopen(fname,"a+"); + fprintf(file,"%s", timestamp); + //printf("\nTerminada la prueba # %d. Guardando resultado en %s\n",r, fname); + //printf("\nTerminada la prueba # %d/%d. Writing data to the file %s\n",r+1 , REP, fname); + //printf("\nAAAAAAAAAA %d...%s\n", counter[1], fname); + // return file pointer + return file; +} + +//++++++++++++++++++++ + +//tests if a file already exists. returns 1 if it exists and 0 if it doesn't + + + +//Funci�n checkTx verifica que la se�al muestreada corresponda a un pulso. +//results1 y results2 son los arreglos que contienen los datos muestreados por ambos canales del ADC del embebido. +//umbral indica qu� valor debe superar una muestra para considerarla un posible pulso o pico. +//pulsewidth indica cu�ntas muestras consecutivas deben superar el umbral para que se considere que se ha detectado un pulso. +int checkTx(long int results1[],long int results2[], float umbral, int pulsewidth){ + + int i, cont; + float z[NSAMPLES], sum, avg; + int isSignal, pulse; + + for(i=0;i umbral){ + if (isSignal == 1){ + cont += 1; + } + if (cont == pulsewidth){ + pulse = 1; + break; + } + isSignal = 1; + continue; + isSignal = 0; + cont = 0; + } + } + + return pulse; //devuelve un entero: 1 si se ha detectado pulso, de lo contrario, 0. +} + + +int fExists(char * fname){ + FILE * file; + + file = fopen (fname, "r"); + if (file == NULL) + { + return 0; + } + fclose(file); + return 1; +} + + +//Funci�n que calcula la mediana de un conjunto de muestras +double mediana(long int *results,unsigned int cuenta){ + unsigned int i=0,j=0,aux=0; + + double median=0; +/*Calculo mediana */ + + for(i=0;iresults[j] ){ + + aux=results[i]; + results[i]=results[j]; + results[j]=aux; + + } + } + + } + median=results[cuenta/2]; + return median; +} + + + +//Funci�n que halla la fase de la se�al. +//Tiene como entradas las muestras correspondientes a la parte real e imaginaria de la se�al. +float getPhase(long int results1[],long int results2[]){ + + unsigned int count=0, i=0,umbral=1000; + //long int results1[]; + //long int results2[]; + long int power[NSAMPLES]; + long int sumI=0,sumQ=0,I[NSAMPLES], Q[NSAMPLES],II[NSAMPLES], QQ[NSAMPLES]; + double median1=0,median2=0; + long int promedioI=0,promedioQ=0;/*Calculo mediana 1*/ + float resultado=0; + + for(i=0;i umbral) + { + + II[count]=I[i]; + QQ[count]=Q[i]; + count=count+1; + + } + + } + + for(i = 0; i < count ; i++){ + + sumI=sumI+II[i]; + sumQ=sumQ+QQ[i]; + + } + + promedioI=sumI; + promedioQ=sumQ; + + resultado = atan2(1.0*promedioI,1.0*promedioQ)*180/3.1416+62-44; + + +return resultado; + +} + + + +//Funci�n que muestra la fase detectada en el terminal y tambi�n la graba en el archivo de texto. +void writeOutput(float resultado, FILE * output){ + + +// + + fprintf(output," %1.2f ",resultado); //graba resultado en archivo .txt +// + +} + +int configCLK(){ + //configuro pin: + AT91S_PMC *sys_clock; + sys_clock = clock_map(CLOCK_BASE); + enable_clock_adc(sys_clock); + //printf("clock ADC enable.\n"); + return 1; + } Index: trunk/absroot/source/absc/Control_Module/at91adc.c =================================================================== diff --git a/trunk/absroot/source/absc/Control_Module/at91adc.c b/trunk/absroot/source/absc/Control_Module/at91adc.c new file mode 10644 --- /dev/null (revision 0) +++ b/trunk/absroot/source/absc/Control_Module/at91adc.c (revision 117) @@ -0,0 +1,138 @@ +/* + * This programmer uses AT91' ADC Module + * + * 2010 by Ricardo V. Rojas Quispe + */ + +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "./Librerias/at91adc.h" + +AT91S_ADC *adc_map(unsigned int adcbase){ + int fd; + void *base; + + AT91S_ADC *adc; + + off_t addr = adcbase; + + if ((fd = open("/dev/mem", O_RDWR | O_SYNC)) == -1) { + fprintf(stderr, "Cannot open /dev/mem.\n"); + exit(EXIT_FAILURE); + } + + + base = mmap(0, MAP_SIZE, PROT_READ | PROT_WRITE, MAP_SHARED, fd, addr & ~MAP_MASK); + + if (base == (void *) -1) { + fprintf(stderr, "Cannot open /dev/mem.\n"); + exit(EXIT_FAILURE); + } + + + adc = base + (addr & MAP_MASK); + + return adc; +} +/**********************Anadido por DCV*ini********/ +AT91S_ADC *adc_map1(unsigned int adcbase){ + int fd; + void *base; + + AT91S_ADC *adc; + + off_t addr = adcbase; + + if ((fd = open("/dev/mem", O_RDWR | O_SYNC)) == -1) { + //fprintf(stderr, "Cannot open /dev/mem.\n"); + exit(EXIT_FAILURE); + } + + base = mmap(0, MAP_SIZE, PROT_READ | PROT_WRITE, MAP_SHARED, fd, addr & ~MAP_MASK); + + if (base == (void *) -1) { + //fprintf(stderr, "Cannot open /dev/mem.\n"); + exit(EXIT_FAILURE); + } + + adc = base + (addr & MAP_MASK); + + return adc; +} + +/*********************Anadido por DCV*fin**********/ +void ADC_INIT(AT91S_ADC * adc){ + //Incia conversion ADC + adc->ADC_CR = ADC_START; +} + +void ADC_RESET(AT91S_ADC * adc){ + //Reset de ADC + adc->ADC_CR = ADC_SWRST; +} +void CONFIG_ADC(AT91S_ADC * adc,unsigned int REG_CONFIG){ + //configura ADC + adc->ADC_MR = REG_CONFIG; + adc->ADC_IDR = ADC_DISABLE_INTERRUP; +} +void ENABLE_CHANNEL(AT91S_ADC * adc,unsigned int CHANNEL){ + //Habilita canal selecconado y deshabilita el resto + adc->ADC_CHER = CHANNEL & 0x0F; + adc->ADC_CHDR = ~CHANNEL & 0x0F; +} +unsigned int STATUS_CHANNEL(AT91S_ADC * adc){ + //Retorna el estado del canal habilitado + return (adc->ADC_CHSR); +} +unsigned int GET_ADC(AT91S_ADC * adc){ + //unsigned int valor=1; + //Retorna el valor de ADC (resolucion de 10BIT) + while(1){ + if ((adc-> ADC_SR & MASK_DRDY) == MASK_DRDY) + break; + } + return (adc->ADC_LCDR & ADC_LDATA); +} +unsigned int GET_STATUS(AT91S_ADC * adc){ + //Retorna el estado del ADC (registro) + return (adc->ADC_SR); +} +unsigned int GET_ADC0(AT91S_ADC * adc){ + //Retorna el valor de la conversion del canal 0 + while(1){ + if ((adc->ADC_SR & MASK_EOC0) == MASK_EOC0) + break; + } + return (adc->ADC_CDR0 & ADC_LDATA); +} +unsigned int GET_ADC1(AT91S_ADC * adc){ + //Retorna el valor de la conversion del canal 1 + while(1){ + if ((adc->ADC_SR & MASK_EOC1) == MASK_EOC1) + break; + } + return (adc->ADC_CDR1 & ADC_LDATA); +} +unsigned int GET_ADC3(AT91S_ADC * adc){ + unsigned int valor=1; + //Retorna el valor de ADC (resolucion de 10BIT) + while(valor){ + if ((adc-> ADC_SR) & 0x10000) + valor = 0; + else + valor = 1; + } + return (adc->ADC_CDR1 & ADC_DATA); +} +unsigned int ver_reg_mode(AT91S_ADC * adc){ + //retorna el valor del ADC_MR + return (adc->ADC_MR); +} Index: trunk/absroot/source/absc/Control_Module/at91gpio.c =================================================================== diff --git a/trunk/absroot/source/absc/Control_Module/at91gpio.c b/trunk/absroot/source/absc/Control_Module/at91gpio.c new file mode 10644 --- /dev/null (revision 0) +++ b/trunk/absroot/source/absc/Control_Module/at91gpio.c (revision 117) @@ -0,0 +1,119 @@ +/* + * This programmer uses AT91' GPIO lines + * + * 2006 by Carlos Camargo + * 2007.May.10 Andres Calderon + * 2009.Aug.26 Jose Francisco Quenta + */ + +#include +#include +#include +#include + + +#include +#include +#include +#include + +#include "./Librerias/at91gpio.h" + +void pio_out(AT91S_PIO * pio, int mask, unsigned long val, int opcion) +{ + if (opcion == 1) + pio->PIO_SODR = mask & val; + else + pio->PIO_CODR = mask & val; +} + + +int pio_in(AT91S_PIO * pio, int mask) +{ + return (pio->PIO_PDSR & mask); +} + + +AT91S_PIO *pio_map(unsigned int piobase) +{ + int fd; + void *base; + + AT91S_PIO *pio; + + off_t addr = piobase; + + if ((fd = open("/dev/mem", O_RDWR | O_SYNC)) == -1) { + fprintf(stderr, "Cannot open /dev/mem.\n"); + exit(EXIT_FAILURE); + } + + fprintf(stderr, "/dev/mem opened.\n"); + + base = mmap(0, MAP_SIZE, PROT_READ | PROT_WRITE, MAP_SHARED, fd, addr & ~MAP_MASK); + + if (base == (void *) -1) { + fprintf(stderr, "Cannot open /dev/mem.\n"); + exit(EXIT_FAILURE); + } + + fprintf(stderr, "Memory mapped at address %p.\n", base); + + pio = base + (addr & MAP_MASK); + + return pio; +} + + +void pio_enable(AT91S_PIO * pio, int mask) +{ + pio->PIO_PER = mask; /* Enable PIO */ +} + +void pio_output_enable(AT91S_PIO * pio, int mask) +{ + pio->PIO_OER = mask; /* Set TDI, TMS and TCK as outputs */ +} + +void pio_input_enable(AT91S_PIO * pio, int mask) +{ + pio->PIO_ODR = mask; /* Set TDO as input */ + pio->PIO_IFER = mask; /* Enable Input Filter */ +} + +void pio_disable_irq(AT91S_PIO * pio, int mask) +{ + pio->PIO_IDR = mask; /* Disable pin interrupts */ +} + +void pio_disable_multiple_driver(AT91S_PIO * pio, int mask) +{ + pio->PIO_MDDR = mask; /* Disable Multiple Diver */ +} + +void pio_disable_pull_ups(AT91S_PIO * pio, int mask) +{ + pio->PIO_PUDR = mask; /* Disable Pull-Ups */ +} + +void pio_synchronous_data_output(AT91S_PIO * pio, int mask) +{ + pio->PIO_OWDR = mask; /* Synchronous Data Output Write in PIO_ */ +} + +//Nuevas funciones: +int ver_registro(AT91S_PIO * pio){ + return (pio->PIO_PSR); +} +//Habilitar pines para usar con ADC +void pin_adc_enable(AT91S_PIO * pio, int mask){ + pio->PIO_PDR = mask; +} +//selecciona para el periferico A +void periferico_a(AT91S_PIO * pio, int mask){ + pio->PIO_ASR = mask; +} +//Retorna cero si esta en el perifierico A y 1 si est aen el periferico B +int ver_periferico(AT91S_PIO * pio){ + return (pio->PIO_ABSR & 0x01); +} Index: trunk/absroot/source/absc/Control_Module/at91sysclock.c =================================================================== diff --git a/trunk/absroot/source/absc/Control_Module/at91sysclock.c b/trunk/absroot/source/absc/Control_Module/at91sysclock.c new file mode 10644 --- /dev/null (revision 0) +++ b/trunk/absroot/source/absc/Control_Module/at91sysclock.c (revision 117) @@ -0,0 +1,55 @@ +/* + * This programmer uses AT91' System clock + * + * 2010 by Ricardo V. Rojas Quispe + */ + +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "./Librerias/at91sysclock.h" + +//Mapeando los registro en memoria: +AT91S_PMC *clock_map(unsigned int clockbase){ + int fd; + void *base; + + AT91S_PMC *clock; + + off_t addr = clockbase; + + if ((fd = open("/dev/mem", O_RDWR | O_SYNC)) == -1) { + fprintf(stderr, "Cannot open /dev/mem.\n"); + exit(EXIT_FAILURE); + } + + //fprintf(stderr, "/dev/mem opened.\n"); + + base = mmap(0, MAP_SIZE, PROT_READ | PROT_WRITE, MAP_SHARED, fd, addr & ~MAP_MASK); + + if (base == (void *) -1) { + fprintf(stderr, "Cannot open /dev/mem.\n"); + exit(EXIT_FAILURE); + } + + //fprintf(stderr, "Memory mapped at address %p.\n", base); + + clock = base + (addr & MAP_MASK); + + return clock; +} +//Habilitamos el clock de ADC +void enable_clock_adc(AT91S_PMC * clock){ + clock->PMC_PCER=0x20; +} +//Leemos el registro de estado de clock para perifericos +unsigned int status_clock_adc(AT91S_PMC * clock){ + return (clock->PMC_PCSR); +}